Re: Questions about the Freescale/NXP QuadSPI controller

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Hi Lukasz,

On 19.09.2018 00:42, Lukasz Majewski wrote:
Dear All,

Maybe I do jump a bit off topic here, but...

I've read through the following thread:
https://patchwork.ozlabs.org/patch/939885/

And it mentions some issues with reading AHB content (buffers) in
fsl-quadspi.c driver discovered when new QuadSPI driver was developed.

The only setup with two chips that is known to be problematic with the new driver, is when both chips are connected to the same bus (e.g. QSPIA) using separate chip selects.

Does your board use this kind of setup, or are the two chips connected two different buses (QSPIA and QSPIB)?

Have you tested the new driver? It would be great to receive some more feedback.

I do have a setup with qspi0 having two SPI memories connected (2x16
MiB), and I'm wondering if anybody has some more info regarding:

(What's more is that there is a bug in
  * the "IP Command Read" in the Vybrid.) found here:
https://elixir.bootlin.com/linux/v4.19-rc4/source/drivers/mtd/spi-nor/fsl-quadspi.c#L671

I've googled for some errata or known issues for vybryd's QSPI IP block
(vf610) but without luck so far ...

Unfortunately I don't know the background for this comment. Is your board using VF610? Do you experience problems?

Regards,
Frieder

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