modules out of tree issue

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Hi Lucas

i have played with the make files and find out that the problem is the
OUTDIR setting in the TARGET.

makefile:
OUTDIR=out/
SOURCES = internal/src/sm36502_uio.o
TARGET=${OUTDIR}alex                                <-- works not

OBJECTS := $(SOURCES:.c=.o)
obj-m := $(TARGET).o
$(TARGET)-y := $(OBJECTS)

This works NOT at Kernel 3.18 but with older kernels

I miss the compile state and get:
sm@debianVM:~/temp/ARMg3k036502Uio$ make
make  ARCH=arm CROSS_COMPILE=/opt/g3DevelBase/g3Toolchain/g3Bsp/sd3XenoArmImx.Bsp.V2/selected_toolchain/arm-v7a-linux-gnueabi- -C /opt/g3DevelBase/g3Toolchain/g3Bsp/sd3XenoArmImx.Bsp.V2/platform-sm-arm/build-target/linux-3.18 M=$PWD  modules
make[1]: Entering directory `/opt/g3DevelBase/g3Toolchain/g3Bsp/sd3XenoArmImx.Bsp.V2/platform-sm-arm/build-target/linux-3.18'
LD [M]  /home/sm/temp/ARMg3k036502Uio/out/alex.o
/opt/g3DevelBase/g3Toolchain/g3Bsp/sd3XenoArmImx.Bsp.V2/selected_toolchain/arm-v7a-linux-gnueabi-ld: no input files

Without given OUTDIR in TARGET it works.

makefile:
SOURCES = internal/src/sm36502_uio.o
TARGET=alex                                                      <--NO  problem

OBJECTS := $(SOURCES:.c=.o)
obj-m := $(TARGET).o
$(TARGET)-y := $(OBJECTS)

sm@debianVM:~/temp/ARMg3k036502Uio$ make
make  ARCH=arm CROSS_COMPILE=/opt/g3DevelBase/g3Toolchain/g3Bsp/sd3XenoArmImx.Bsp.V2/selected_toolchain/arm-v7a-linux-gnueabi- -C /opt/g3DevelBase/g3Toolchain/g3Bsp/sd3XenoArmImx.Bsp.V2/platform-sm-arm/build-target/linux-3.18 M=$PWD  modules
make[1]: Entering directory `/opt/g3DevelBase/g3Toolchain/g3Bsp/sd3XenoArmImx.Bsp.V2/platform-sm-arm/build-target/linux-3.18'
CC [M]  /home/sm/temp/ARMg3k036502Uio/internal/src/sm36502_uio.o
  LD [M]  /home/sm/temp/ARMg3k036502Uio/alex.o
  Building modules, stage 2.
  MODPOST 1 modules
  CC      /home/sm/temp/ARMg3k036502Uio/alex.mod.o
  LD [M]  /home/sm/temp/ARMg3k036502Uio/alex.ko

Then I played with kernelversion too:
3.17.8 works with my OUTDIR in TARGET
3.18 works not

I found a diff in /scripts/Makefile.build 

@@ -386,7 +386,7 @@
               $(call if_changed,link_multi-y)
$(call multi_depend, $(multi-used-y), .o, -objs -y)

+$(multi-used-m): FORCE
-$(multi-used-m) : %.o: $(multi-objs-m) FORCE
               $(call if_changed,link_multi-m)
               @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
$(call multi_depend, $(multi-used-m), .o, -objs -y)

I'm not sure but the dependencies are lost??? 

When I set $(multi-used-m): FORCE  to  $(multi-used-m) : %.o: $(multi-objs-m) FORCE in the makefile.build,
all my modules make files are lucky.

I hope that helps to find out what is going wrong and we find a solution how I can
use a outputdir in the makefile.


---
Alexander 

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