The X1E80100 has two SDHC controllers (called SDC2 and SDC4). Describe both of them and enable the SDC2 on QCP. This brings SD card support for the microSD port on QCP. The SDC4 is described but there is no device outthere yet that makes use of it, AFAIK. Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx> --- Changes in v5: - Switched the interconnect paths tags to QCOM_ICC_TAG_ALWAYS and QCOM_ICC_TAG_ACTIVE_ONLY, as Konrad suggested. - Actually enabled the sdhc on QCP (status = "okay" was missing). - Rebased to fix conflicts due to smb2360 nodes which were already merged. - Link to v4: https://lore.kernel.org/r/20241212-x1e80100-qcp-sdhc-v4-0-a74c48ee68a3@xxxxxxxxxx Changes in v4: - Squashed the pinconf for SDC2 into the patch that describes the controllers. - Reworded the commit messages a bit. - Link to v3: https://lore.kernel.org/r/20241022-x1e80100-qcp-sdhc-v3-0-46c401e32cbf@xxxxxxxxxx Changes in v3: - Reordered the default and sleep pinconfs. Also the bias and drive-strength properties. As per Konrad's suggestion. - Link to v2: https://lore.kernel.org/r/20241014-x1e80100-qcp-sdhc-v2-0-868e70a825e0@xxxxxxxxxx Changes in v2: - rebased on next-20241011 - dropped the bindings schema update patch - dropped the sdhci-caps-mask properties from both controllers as SDR104/SDR50 are actually supported - Link to v1: https://lore.kernel.org/r/20241008-x1e80100-qcp-sdhc-v1-0-dfef4c92ae31@xxxxxxxxxx --- Abel Vesa (2): arm64: dts: qcom: x1e80100: Describe the SDHC controllers arm64: dts: qcom: x1e80100-qcp: Enable SD card support arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 21 +++++ arch/arm64/boot/dts/qcom/x1e80100.dtsi | 146 ++++++++++++++++++++++++++++++ 2 files changed, 167 insertions(+) --- base-commit: 8155b4ef3466f0e289e8fcc9e6e62f3f4dceeac2 change-id: 20241007-x1e80100-qcp-sdhc-15c716dad946 Best regards, -- Abel Vesa <abel.vesa@xxxxxxxxxx>
