> -----Original Message----- > From: Peng Fan <peng.fan@xxxxxxx> > Sent: 2024年10月28日 10:10 > To: Josua Mayer <josua@xxxxxxxxxxxxx>; Adrian Hunter > <adrian.hunter@xxxxxxxxx>; Bough Chen <haibo.chen@xxxxxxx>; Ulf Hansson > <ulf.hansson@xxxxxxxxxx>; Shawn Guo <shawnguo@xxxxxxxxxx>; Sascha Hauer > <s.hauer@xxxxxxxxxxxxxx>; Pengutronix Kernel Team > <kernel@xxxxxxxxxxxxxx>; Fabio Estevam <festevam@xxxxxxxxx> > Cc: yazan.shhady <yazan.shhady@xxxxxxxxxxxxx>; Rabeeh Khoury > <rabeeh@xxxxxxxxxxxxx>; imx@xxxxxxxxxxxxxxx; linux-mmc@xxxxxxxxxxxxxxx; > dl-S32 <S32@xxxxxxx>; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; > linux-kernel@xxxxxxxxxxxxxxx > Subject: RE: [PATCH] mmc: host: sdhci-esdhc-imx: implement emmc hardware > reset > > > Subject: [PATCH] mmc: host: sdhci-esdhc-imx: implement emmc hardware > > reset > > > > NXP ESDHC supports control of native emmc reset signal when pinmux is > > set accordingly, using uSDHCx_SYS_CTRL register IPP_RST_N bit. > > Documentation is available in NXP i.MX6Q Reference Manual. > > But this relies on the PAD been configured as RESET, should this flow being > default enabled whether the PAD is configured as RESET or not? No, from my understanding, even the PAD is configured as RESET, still need SW to config IPP_RST_N to control the output of this pad. Josua, you can double confirm this on your board. By the way, I check the code, when you do the test to support this reset operation on eMMC, did you add "cap-mmc-hw-reset" in dts?
