From: Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx>
Add binding for the Qualcomm IPQ5424 Global Clock Controller
Signed-off-by: Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx>
---
[V4] Added 2 new PCIE clks to end of the list, preserving default order
.../bindings/clock/qcom,ipq5332-gcc.yaml | 40 ++-
include/dt-bindings/clock/qcom,ipq5424-gcc.h | 156 +++++++++
include/dt-bindings/reset/qcom,ipq5424-gcc.h | 310 ++++++++++++++++++
3 files changed, 499 insertions(+), 7 deletions(-)
create mode 100644 include/dt-bindings/clock/qcom,ipq5424-gcc.h
create mode 100644 include/dt-bindings/reset/qcom,ipq5424-gcc.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
index 9193de681de2..ef1fd9d9f8da 100644
--- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
@@ -4,31 +4,35 @@
$id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller on IPQ5332
+title: Qualcomm Global Clock & Reset Controller on IPQ5332 and IPQ5424
maintainers:
- Bjorn Andersson <andersson@xxxxxxxxxx>
description: |
Qualcomm global clock control module provides the clocks, resets and power
- domains on IPQ5332.
+ domains on IPQ5332 and IPQ5424.
- See also:: include/dt-bindings/clock/qcom,gcc-ipq5332.h
-
-allOf:
- - $ref: qcom,gcc.yaml#
+ See also:
+ include/dt-bindings/clock/qcom,gcc-ipq5332.h
+ include/dt-bindings/clock/qcom,gcc-ipq5424.h
properties:
compatible:
- const: qcom,ipq5332-gcc
+ enum:
+ - qcom,ipq5332-gcc
+ - qcom,ipq5424-gcc
clocks:
+ minItems: 5
items:
- description: Board XO clock source
- description: Sleep clock source
- description: PCIE 2lane PHY pipe clock source
- description: PCIE 2lane x1 PHY pipe clock source (For second lane)
- description: USB PCIE wrapper pipe clock source
+ - description: PCIE 2-lane PHY2 pipe clock source
+ - description: PCIE 2-lane PHY3 pipe clock source
'#power-domain-cells': false
'#interconnect-cells':
@@ -38,6 +42,28 @@ required:
- compatible
- clocks
+allOf:
+ - $ref: qcom,gcc.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,ipq5332-gcc
+ then:
+ properties:
+ clocks:
+ maxItems: 5
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,ipq5424-gcc
+ then:
+ properties:
+ clocks:
