Hi Frank
Thanks for the review, and sorry for the delay in coming back to this.
On Wed, 5 Jun 2024 at 18:53, Frank Li <Frank.li@xxxxxxx> wrote:
>
> On Fri, May 24, 2024 at 07:26:50PM +0100, Dave Stevenson wrote:
> > From: Stefan Wahren <stefan.wahren@xxxxxxxx>
> >
> > Actually the criteria to increment source & destination address doesn't
> > based on platform specific bits. It's just the DMA transfer direction which
> > is translated into the info bits. So introduce two new helper functions
> > and get the rid of these platform specifics.
> >
>
> Fix increment source & destination address depend on the platform drvdata.
This is not platform drvdata.
The code was converting from the generic DMA transfer direction enum
into the hardware specific bitmask, and then looking at that for
whether it was using an address increment or not.
It's more readable, and easier to add in the newer variant of the
hardware, if we check the generic transfer direction.
I've reworded it for V2 as
"The criteria for whether an address increment is required is based
solely on the DMA transfer direction. The driver was converting from
direction into the hardware's "info" bitmask and using that, which
is therefore dependent on the hardware variant.
Change to using the DMA transfer direction via helper functions
to remove this hardware specific dependency."
Hopefully makes the situation clearer.
> It should be depend on dma_transfer_direction.
>
> look like it is bug fixes. Can you add fixes tag.
No, as described above, it's not a bug fix.
Dave
> > Signed-off-by: Stefan Wahren <wahrenst@xxxxxxx>
> > Signed-off-by: Dave Stevenson <dave.stevenson@xxxxxxxxxxxxxxx>
> > ---
> > drivers/dma/bcm2835-dma.c | 28 ++++++++++++++++++++++------
> > 1 file changed, 22 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c
> > index ef452ebb3c15..d6c5a2762a46 100644
> > --- a/drivers/dma/bcm2835-dma.c
> > +++ b/drivers/dma/bcm2835-dma.c
> > @@ -252,6 +252,24 @@ static u32 bcm2835_dma_prepare_cb_extra(struct bcm2835_chan *c,
> > return result;
> > }
> >
> > +static inline bool need_src_incr(enum dma_transfer_direction direction)
> > +{
> > + return direction != DMA_DEV_TO_MEM;
> > +}
> > +
> > +static inline bool need_dst_incr(enum dma_transfer_direction direction)
> > +{
> > + switch (direction) {
> > + case DMA_MEM_TO_MEM:
> > + case DMA_DEV_TO_MEM:
> > + return true;
> > + default:
> > + break;
> > + }
> > +
> > + return false;
> > +}
> > +
> > static void bcm2835_dma_free_cb_chain(struct bcm2835_desc *desc)
> > {
> > size_t i;
> > @@ -336,10 +354,8 @@ static inline size_t bcm2835_dma_count_frames_for_sg(
> > * @cyclic: it is a cyclic transfer
> > * @info: the default info bits to apply per controlblock
> > * @frames: number of controlblocks to allocate
> > - * @src: the src address to assign (if the S_INC bit is set
> > - * in @info, then it gets incremented)
> > - * @dst: the dst address to assign (if the D_INC bit is set
> > - * in @info, then it gets incremented)
> > + * @src: the src address to assign
> > + * @dst: the dst address to assign
> > * @buf_len: the full buffer length (may also be 0)
> > * @period_len: the period length when to apply @finalextrainfo
> > * in addition to the last transfer
> > @@ -408,9 +424,9 @@ static struct bcm2835_desc *bcm2835_dma_create_cb_chain(
> > d->cb_list[frame - 1].cb->next = cb_entry->paddr;
> >
> > /* update src and dst and length */
> > - if (src && (info & BCM2835_DMA_S_INC))
> > + if (src && need_src_incr(direction))
> > src += control_block->length;
> > - if (dst && (info & BCM2835_DMA_D_INC))
> > + if (dst && need_dst_incr(direction))
> > dst += control_block->length;
> >
> > /* Length of total transfer */
> > --
> > 2.34.1
> >
