On Sat, Feb 17, 2024 at 10:48:26PM +0800, Jisheng Zhang wrote:
> Add sdhci dt node in SoC dtsi and enable it in milkv duo dts.
>
> Signed-off-by: Jisheng Zhang <jszhang@xxxxxxxxxx>
LGTM.
Reviewed-by: Inochi Amaoto <inochiama@xxxxxxxxxxx>
> ---
> Since cv1800b's clk support isn't in, this patch uses fixed dummy clk
> and just RFC, I will send formal patch after clk support is ready.
>
> .../riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 8 ++++++++
> arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 17 +++++++++++++++++
> 2 files changed, 25 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
> index 3af9e34b3bc7..94e64ddce8fa 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
> +++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
> @@ -33,6 +33,14 @@ &osc {
> clock-frequency = <25000000>;
> };
>
> +&sdhci0 {
> + status = "okay";
> + bus-width = <4>;
> + no-1-8-v;
> + no-mmc;
> + no-sdio;
> +};
> +
> &uart0 {
> status = "okay";
> };
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 2d6f4a4b1e58..405f4ba18392 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -4,6 +4,7 @@
> * Copyright (C) 2023 Inochi Amaoto <inochiama@xxxxxxxxxxx>
> */
>
> +#include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/interrupt-controller/irq.h>
>
> / {
> @@ -45,6 +46,13 @@ osc: oscillator {
> #clock-cells = <0>;
> };
>
> + sdhci_clk: sdhci-clock {
> + compatible = "fixed-clock";
> + clock-frequency = <375000000>;
> + clock-output-names = "sdhci_clk";
> + #clock-cells = <0>;
> + };
> +
> soc {
> compatible = "simple-bus";
> interrupt-parent = <&plic>;
> @@ -175,6 +183,15 @@ uart4: serial@41c0000 {
> status = "disabled";
> };
>
> + sdhci0: mmc@4310000 {
> + compatible = "sophgo,cv1800b-dwcmshc";
> + reg = <0x4310000 0x1000>;
> + interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&sdhci_clk>;
> + clock-names = "core";
> + status = "disabled";
> + };
> +
> plic: interrupt-controller@70000000 {
> reg = <0x70000000 0x4000000>;
> interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;
> --
> 2.43.0
>
