On 3/21/24 10:57, Christian Loehle wrote:
In the long-term it looks like for UFS the problem will disappear as we are expected to get one queue/hardirq per CPU (as Bart mentioned), on NVMe that is already the case.
Why the focus on storage controllers with a single completion interrupt? It probably won't take long (one year?) until all new high-end smartphones may have support for multiple completion interrupts. Thanks, Bart.
