On Wed, Nov 15, 2023 at 11:25:18PM +0800, Jisheng Zhang wrote:
> On Wed, Nov 15, 2023 at 11:22:03PM +0800, Jisheng Zhang wrote:
> > On Tue, Nov 14, 2023 at 05:30:26PM -0500, Drew Fustini wrote:
> > > On Tue, Nov 14, 2023 at 09:27:44PM +0000, Conor Dooley wrote:
> > > > On Tue, Nov 14, 2023 at 04:07:59PM -0500, Drew Fustini wrote:
> > > >
> > > > > + sdhci_clk: sdhci-clock {
> > > > > + compatible = "fixed-clock";
> > > > > + clock-frequency = <198000000>;
> > > > > + clock-output-names = "sdhci_clk";
> > > > > + #clock-cells = <0>;
> > > > > + };
> > > >
> > > > If only you had a clock driver to provide these...
> > > >
> > > > Is someone working on a resubmission of the clock driver?
> > >
> > > Yangtao Li posted an initial revision back [1] in May but I don't think
> > > there has been any follow up. It is for sure something we need to have
> > > in mainline so I'll take a look at getting that effort going again.
> >
> > Hi Drew,
> >
> > Based on Yangtao's version, I cooked an updated version in last
> > development window but still can't complete it and met some issues
> > which need the clk/pll register document.
> > IIRC, the document was released a few days ago before soc tree frozen.
> >
> > It's nice if you can continue the effort! I'll read the sdhci driver
> > soon.
>
> PS: I can send my updated version to you for reference tomorrow.
Thank you, that would be great!
Drew
