On Fri, 2023-08-25 at 17:17 +0800, Shawn Lin wrote: > > > On 2023/8/25 16:39, Sharp.Xia@xxxxxxxxxxxx wrote: > > On Fri, 2023-08-25 at 16:11 +0800, Shawn Lin wrote: > >> > >> Hi Sharp, > > ... > > >>> 1024 > >>> > > Hi Shawn, > > > > What is your readahead value before and after applying this patch? > > > > The original readahead is 128, and after applying the patch is 1024 > > > cat /d/mmc0/ios > clock: 200000000 Hz > actual clock: 200000000 Hz > vdd: 18 (3.0 ~ 3.1 V) > bus mode: 2 (push-pull) > chip select: 0 (don't care) > power mode: 2 (on) > bus width: 3 (8 bits) > timing spec: 10 (mmc HS400 enhanced strobe) > signal voltage: 1 (1.80 V) > driver type: 0 (driver type B) > > The driver I used is sdhci-of-dwcmshc.c with a KLMBG2JETDB041 eMMC > chip. I tested with RK3568 and sdhci-of-dwcmshc.c driver, the performance improved by 2~3%. Before: root@OpenWrt:/mnt/mmcblk0p3# time dd if=test.img of=/dev/null 2097152+0 records in 2097152+0 records out real 0m 6.01s user 0m 0.84s sys 0m 2.89s root@OpenWrt:/mnt/mmcblk0p3# cat /sys/block/mmcblk0/queue/read_ahead_kb 128 After: root@OpenWrt:/mnt/mmcblk0p3# echo 3 > /proc/sys/vm/drop_caches root@OpenWrt:/mnt/mmcblk0p3# time dd if=test.img of=/dev/null 2097152+0 records in 2097152+0 records out real 0m 5.86s user 0m 1.04s sys 0m 3.18s root@OpenWrt:/mnt/mmcblk0p3# cat /sys/block/mmcblk0/queue/read_ahead_kb 1024 root@OpenWrt:/sys/kernel/debug/mmc0# cat ios clock: 200000000 Hz actual clock: 200000000 Hz vdd: 18 (3.0 ~ 3.1 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 3 (8 bits) timing spec: 9 (mmc HS200) signal voltage: 1 (1.80 V) driver type: 0 (driver type B)
