On 08/04/2023 23:40, Abel Vesa wrote: > Starting with SM8550, the ICE will have its own devicetree node > so add the qcom,ice property to reference it. > > Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx> > --- > > The v6 is here: > https://lore.kernel.org/all/20230407105029.2274111-3-abel.vesa@xxxxxxxxxx/ > > Changes since v6: > * Dropped the minItems for both the qcom,ice and the reg in the > qcom,ice compatile subschema, like Krzysztof suggested > > Changes since v5: > * dropped the sm8550 specific subschema and replaced it with one that > mutually excludes the qcom,ice vs both the ICE specific reg range > and the ICE clock > > Changes since v4: > * Added check for sm8550 compatible w.r.t. qcom,ice in order to enforce > it while making sure none of the other platforms are allowed to use it > > Changes since v3: > * dropped the "and drop core clock" part from subject line > > Changes since v2: > * dropped all changes except the qcom,ice property > > > .../devicetree/bindings/ufs/qcom,ufs.yaml | 24 +++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml > index c5a06c048389..10d426ba1959 100644 > --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml > +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml > @@ -70,6 +70,10 @@ properties: > power-domains: > maxItems: 1 > > + qcom,ice: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: phandle to the Inline Crypto Engine node > + > reg: > minItems: 1 > maxItems: 2 > @@ -187,6 +191,26 @@ allOf: > > # TODO: define clock bindings for qcom,msm8994-ufshc > > + - if: > + properties: > + qcom,ice: Un-reviewed. This is broken and was never tested. After applying this patch, I can see many new warnings in all DTBs (so it is easy to spot that it was not actually tested). Your probably meant here: if: required: Best regards, Krzysztof
