On Thu, 15 Jun 2023 at 11:20, Yann Gautier <yann.gautier@xxxxxxxxxxx> wrote: > > For STM32MP25, we'll need to distinguish how is managed the delay block. > This is done through a new comptible dedicated for this SoC, as the > delay block registers are located in SYSCFG peripheral. > > Signed-off-by: Yann Gautier <yann.gautier@xxxxxxxxxxx> > --- > Documentation/devicetree/bindings/mmc/arm,pl18x.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml > index 1c96da04f0e53..e47b3418b6c77 100644 > --- a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml > +++ b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml > @@ -59,6 +59,12 @@ properties: > - const: st,stm32-sdmmc2 > - const: arm,pl18x > - const: arm,primecell > + - description: Entry for STMicroelectronics variant of PL18x for > + STM32MP25. This dedicated compatible is used by bootloaders. What does this last sentence mean? Can we drop it? > + items: > + - const: st,stm32mp25-sdmmc2 > + - const: arm,pl18x > + - const: arm,primecell > > clocks: > description: One or two clocks, the "apb_pclk" and the "MCLK" > -- > 2.25.1 > Kind regards Uffe
