On 23-03-27 11:32:11, Eric Biggers wrote: > On Mon, Mar 27, 2023 at 04:47:33PM +0300, Abel Vesa wrote: > > Now that there is a new dedicated ICE driver, drop the sdhci-msm ICE > > implementation and use the new ICE api provided by the Qualcomm soc > > driver ice. The platforms that already have ICE support will use the > > API as library since there will not be a devicetree node, but instead > > they have reg range. In this case, the of_qcom_ice_get will return an > > ICE instance created for the consumer's device. But if there are > > platforms that do not have ice reg in the consumer devicetree node > > and instead provide a dedicated ICE devicetree node, theof_qcom_ice_get > > will look up the device based on qcom,ice property and will get the ICE > > instance registered by the probe function of the ice driver. > > > > Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx> > > --- > > > > The v3 (RFC) is here: > > https://lore.kernel.org/all/20230313115202.3960700-7-abel.vesa@xxxxxxxxxx/ > > > > Changes since v3: > > * added back the checks for and the setting of MMC_CAP2_CRYPTO > > * added enable/resume/suspend implementation for !CONFIG_MMC_CRYPTO > > * dropped cfg->crypto_cap_idx argument from qcom_ice_program_key > > > > Changes since v2: > > * added the suspend API call for ICE > > * kept old wrappers over ICE API in > > > > Changes since v1: > > * Added a check for supported algorithm and key size > > and passed the ICE defined values for algorithm and key size > > * Added call to evict function > > > > drivers/mmc/host/Kconfig | 2 +- > > drivers/mmc/host/sdhci-msm.c | 220 +++++++---------------------------- > > 2 files changed, 46 insertions(+), 176 deletions(-) > > > > diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig > > index 4745fe217ade..09f837df5435 100644 > > --- a/drivers/mmc/host/Kconfig > > +++ b/drivers/mmc/host/Kconfig > > @@ -549,7 +549,7 @@ config MMC_SDHCI_MSM > > depends on MMC_SDHCI_PLTFM > > select MMC_SDHCI_IO_ACCESSORS > > select MMC_CQHCI > > - select QCOM_SCM if MMC_CRYPTO > > + select QCOM_INLINE_CRYPTO_ENGINE if MMC_CRYPTO > > help > > This selects the Secure Digital Host Controller Interface (SDHCI) > > support present in Qualcomm SOCs. The controller supports > > diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c > > index 8ac81d57a3df..1a6e63b7af12 100644 > > --- a/drivers/mmc/host/sdhci-msm.c > > +++ b/drivers/mmc/host/sdhci-msm.c > > @@ -19,6 +19,8 @@ > > #include <linux/pinctrl/consumer.h> > > #include <linux/reset.h> > > > > +#include <soc/qcom/ice.h> > > + > > #include "sdhci-cqhci.h" > > #include "sdhci-pltfm.h" > > #include "cqhci.h" > > @@ -258,12 +260,14 @@ struct sdhci_msm_variant_info { > > struct sdhci_msm_host { > > struct platform_device *pdev; > > void __iomem *core_mem; /* MSM SDCC mapped address */ > > - void __iomem *ice_mem; /* MSM ICE mapped address (if available) */ > > int pwr_irq; /* power irq */ > > struct clk *bus_clk; /* SDHC bus voter clock */ > > struct clk *xo_clk; /* TCXO clk needed for FLL feature of cm_dll*/ > > - /* core, iface, cal, sleep, and ice clocks */ > > - struct clk_bulk_data bulk_clks[5]; > > + /* core, iface, cal and sleep clocks */ > > + struct clk_bulk_data bulk_clks[4]; > > +#ifdef CONFIG_MMC_CRYPTO > > + struct qcom_ice *ice; > > +#endif > > Similarly to the UFS patch, it is not clear that the calls to > clk_prepare_enable() and clk_disable_unprepare() on the ICE clock are paired up > anymore, with qcom_ice_enable() in particular seeming to be unpaired. Perhaps > it should continue to be enabled / disabled at the same time as the other host > controller clocks are enabled / disabled? > > Also, are you sure that the ICE clock is actually being found? > drivers/soc/qcom/ice.c does: > > engine->core_clk = devm_clk_get(dev, NULL); > if (IS_ERR(engine->core_clk)) > return ERR_CAST(engine->core_clk); > > It is not clear how that can get the clock named "ice" from the device tree. I guess here we need to do something like this: /* legacy consumers use different clk names, so try those first */ engine->core_clk = devm_clk_get_optional_enabled(dev, "ice_core_clk"); if (!engine->core_clk) engine->core_clk = devm_clk_get_optional_enabled(dev, "ice"); if (!engine->core_clk) engine->core_clk = devm_clk_get_enabled(dev, NULL); if (IS_ERR(engine->core_clk)) return ERR_CAST(engine->core_clk); This is because we have two different clock names in sdhc and ufs legacy devicetree nodes. > > - Eric
