Some SoCs (like msm8998) only have a SDHC<->DDR path. Allow this case.
Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
---
Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
index 01f77a77987c..64df6919abaf 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
@@ -127,11 +127,13 @@ properties:
phandle to apps_smmu node with sid mask.
interconnects:
+ minItems: 1
items:
- description: data path, sdhc to ddr
- description: config path, cpu to sdhc
interconnect-names:
+ minItems: 1
items:
- const: sdhc-ddr
- const: cpu-sdhc
--
2.39.1
