On 30/01/2023 12:56, Kathiravan Thirumoorthy wrote:
>>>> + sdhc: mmc@7804000 {
>>>> + compatible = "qcom,ipq5332-sdhci", "qcom,sdhci-msm-v5";
>>>> + reg = <0x07804000 0x1000>, <0x07805000 0x1000>;
>>>> +
>>>> + interrupts = <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
>>>> + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>;
>>>> + interrupt-names = "hc_irq", "pwr_irq";
>>>> +
>>>> + clocks = <&gcc GCC_SDCC1_AHB_CLK>,
>>>> + <&gcc GCC_SDCC1_APPS_CLK>,
>>>> + <&xo_board>;
>>>> + clock-names = "iface", "core", "xo";
>>>> + mmc-ddr-1_8v;
>>>> + mmc-hs200-1_8v;
>>>> + max-frequency = <192000000>;
>>> As Krzysztof pointed out, this one should go.
>>
>>
>> Ack.
>
> Krzysztof & Konrad,
>
> These are the properties of the SDHC controller present in the SoC. So I
> think no need to move out these properties to board DTS. Please let me
> know if my understanding is otherwise.
Usually max frequency of SDHC controller is depending on the board, so
no, it is not a property of SoC. The same with type of attached memory.
Best regards,
Krzysztof
