Document the cadence qspi controller compatible for AMD Pensando
Elba SoC boards. The Elba qspi fifo size is 1024.
Signed-off-by: Brad Larson <blarson@xxxxxxx>
---
Changes since v6:
- Add 1024 to cdns,fifo-depth property to resolve dtbs_check error
---
.../devicetree/bindings/spi/cdns,qspi-nor.yaml | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
index 4707294d8f59..a6556854234f 100644
--- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
+++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
@@ -20,11 +20,23 @@ allOf:
required:
- power-domains
+ - if:
+ properties:
+ compatible:
+ enum:
+ - amd,pensando-elba-qspi
+ then:
+ properties:
+ cdns,fifo-depth:
+ enum: [ 128, 256, 1024 ]
+ default: 1024
+
properties:
compatible:
oneOf:
- items:
- enum:
+ - amd,pensando-elba-qspi
- ti,k2g-qspi
- ti,am654-ospi
- intel,lgm-qspi
@@ -48,7 +60,7 @@ properties:
description:
Size of the data FIFO in words.
$ref: "/schemas/types.yaml#/definitions/uint32"
- enum: [ 128, 256 ]
+ enum: [ 128, 256, 1024 ]
default: 128
cdns,fifo-width:
--
2.17.1
