Hi!
Thanks for reply. Sorry for delay.
13.11.2022 23:06, Jerome Brunet wrote:
On Thu 10 Nov 2022 at 18:00, Vyacheslav Bocharov <adeep@xxxxxxxxx> wrote:
The mmc driver use the same phase values (core - 180, tx/rx - 0) for all
meson64 platforms. However, some platforms (and even some boards) require
different values
Where does it stops ? Trying to solve the instabilities of this
IP/driver by tweaking the phase has proven to be dead-end.
As a result, there is now a stalemate and various real-world operating
system projects use patches to change clock phases.
Soon, you'll end up tweaking these settings depending on the on
particular version of the device because it ships with a different eMMC
manufacturer. Then comes multi sourcing, sdio modules, sdcards ...
(axg for example use 270 degree for core clock).
Where ? Upstream linux does not
Armbian/Home Assistant OS use core phase 270 for axg/g12/sm1 boards
(patches by Neil). On JetHub devices phase 270 is need with eMMC more
than 16Gb size.
u-boot does something of the sort for sm1 and I'm not entirely sure this
appropriate either.
U-boot in Armbian/HAOS use same phase 270 or/and force low speed mode
for eMMC (limit clock freq).
IMO, this setting has more to do with the mode the mmc device is
operating at - not the platform or board.
We had some discussions with the HW designers at AML and they recommended
to keep a phase shift of 180 between the Core and Tx. They also
recommended to leave Rx alone (actually, starting from the v3, the Rx
field has no effect. It is not even wired to actual HW)
I do not have access to AML engineers :)
I can only test settings on several different boards. And it seems that
the phase settings depend not only on the board layout, but also on the
eMMC chip used. What to do about this (if not to use the magic of the
driver from AML) other than providing the ability to change the value in
devicetree for each board I can't think of yet.
Funnily, that is not what the vendor driver does. It also does A LOT of
extremely complex and 'debatable' things, which mostly mask how much the
driver is unstable.
As far as I understand they just go through all possible values until
the first successful attempt to initialize the device.
What do you think of the idea to implement such a variant for the
meson-gx driver?
With the upstream drivers, modes up to SDR50 and HS200 have been stable
lately. SDR104 and DDR modes (DDR52 or HS400) remains problematic.
I have troubles with HS200, for example:
Card Type [CARD_TYPE: 0x57]
HS200 Single Data Rate eMMC @200MHz 1.8VI/O
HS Dual Data Rate eMMC @52MHz 1.8V or 3VI/O
HS eMMC @52MHz - at rated device voltage(s)
HS eMMC @26MHz - at rated device voltage(s)
Changing the settings further would require more discussion with AML.
Blindly poking these value until you get something stablish for 1
particular use case is a recipe for disaster.
I assumed the idea that the dts are edited by the maintainers or the
board developers and will be able to choose the values themselves.
This patch
transfers the values from the code to the variables in the device-tree files.
If not set in dts, use old default values.
I think going that way is opening a big can of worms.
I don't think this should be applied
Vyacheslav Bocharov (4):
arm64: amlogic: mmc: meson-gx: Add core, tx, rx eMMC/SD/SDIO phase
clock settings from devicetree data
arm64: amlogic: mmc: meson-gx: Add dts binding include for core, tx,
rx eMMC/SD/SDIO phase clock settings from devicetree data
arm64: amlogic: dts: meson: update meson-axg device-tree for new core,
tx, rx phase clock settings.
arm64: dts: docs: Update mmc meson-gx documentation for new config
option amlogic,mmc-phase
.../bindings/mmc/amlogic,meson-gx.txt | 7 ++++
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 3 ++
drivers/mmc/host/meson-gx-mmc.c | 18 +++++++---
include/dt-bindings/mmc/meson-gx-mmc.h | 35 +++++++++++++++++++
4 files changed, 58 insertions(+), 5 deletions(-)
create mode 100644 include/dt-bindings/mmc/meson-gx-mmc.h
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--
Vyacheslav Bocharov
