On Mon, 14 Nov 2022 17:02:12 -0600, Dinh Nguyen wrote: > Document the optional "altr,sysmgr-syscon" binding that is used to > access the System Manager register that controls the SDMMC clock > phase. > > Signed-off-by: Dinh Nguyen <dinguyen@xxxxxxxxxx> > --- > v9: remove required for "altr,sysmgr-syscon" > v8: remove "" around synopsys-dw-mshc-common.yaml# > v7: and "not" for the required "altr,sysmgr-syscon" binding > v6: make "altr,sysmgr-syscon" optional > v5: document reg shift > v4: add else statement > v3: document that the "altr,sysmgr-syscon" binding is only applicable to > "altr,socfpga-dw-mshc" > v2: document "altr,sysmgr-syscon" in the MMC section > --- > .../bindings/mmc/synopsys-dw-mshc.yaml | 32 +++++++++++++++++-- > 1 file changed, 29 insertions(+), 3 deletions(-) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
