On 11/2/22 02:37, Adrian Hunter wrote:
On 19/10/22 08:48, Sai Krishna Potthuri wrote:
Add dynamic configuration support for Xilinx ZynqMP which takes care of
configuring the SD secure space configuration registers using EEMI APIs,
performing SD reset assert and deassert.
High level sequence:
- Check for the PM dynamic configuration support, if no error proceed with
SD dynamic configurations(next steps) otherwise skip the dynamic
configuration.
- Put the SD Controller in reset.
- Configure SD Fixed configurations.
- Configure the SD Slot Type.
- Configure the BASE_CLOCK.
- Configure the 8-bit support.
- Bring the SD Controller out of reset.
- Wait for 1msec delay.
Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@xxxxxxx>
Can we get an Ack from xilinx folks?
Xilinx was acquired by AMD some time ago. This has been tested and reviewed
internally already. But
Acked-by: Michal Simek <michal.simek@xxxxxxx>
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
