On 28/09/2022 18:54, Dinh Nguyen wrote: > Document the optional "altr,sysmgr-syscon" binding that is used to > access the System Manager register that controls the SDMMC clock > phase. > > Signed-off-by: Dinh Nguyen <dinguyen@xxxxxxxxxx> > --- Thank you for your patch. There is something to discuss/improve. > + > +allOf: > + - $ref: "synopsys-dw-mshc-common.yaml#" > + > + - if: > + properties: > + compatible: > + contains: > + const: > + - altr,socfpga-dw-mshc It still should not be an array, even if there is no warning. > + then: > + required: > + - altr,sysmgr-syscon > + else: > + properties: > + altr,sysmgr-syscon: false Best regards, Krzysztof
