On 5/17/2022 11:04 AM, Kamal Dasu wrote:
The 72116B0 has improved SDIO controllers that allow the max clock rate to be increased from a max of 100MHz to a max of 150MHz. Optional "sdio_freq" clock is used to drive the bus clock if present optional property "max-frequency" specifies a base clock frequency in Hz that overrides the base clock frequency in the CAPS registers. Signed-off-by: Kamal Dasu <kdasu.kdev@xxxxxxxxx> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Acked-by: Florian Fainelli <f.fainelli@xxxxxxxxx> -- Florian
