On Mon, 4 Apr 2022 at 13:49, Wolfram Sang
<wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote:
>
> When HS400 tuning is complete and HS400 is going to be activated, we
> have to keep the current number of TAPs and should not overwrite them
> with a hardcoded value. This was probably a copy&paste mistake when
> upporting HS400 support from the BSP.
>
> Fixes: 26eb2607fa28 ("mmc: renesas_sdhi: add eMMC HS400 mode support")
> Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
Applied for fixes, thanks!
Kind regards
Uffe
> ---
>
> Lightly tested with a Renesas R-Car M3N SoC. I think I can't really test
> it because my TAPs are usually stable in my environment. The fix should
> be obvious, though. Shimoda-san, are you happy with it?
>
> drivers/mmc/host/renesas_sdhi_core.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
> index 89d21231ec5f..4404ca1f98d8 100644
> --- a/drivers/mmc/host/renesas_sdhi_core.c
> +++ b/drivers/mmc/host/renesas_sdhi_core.c
> @@ -394,10 +394,10 @@ static void renesas_sdhi_hs400_complete(struct mmc_host *mmc)
> SH_MOBILE_SDHI_SCC_TMPPORT2_HS400OSEL) |
> sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_TMPPORT2));
>
> - /* Set the sampling clock selection range of HS400 mode */
> sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL,
> SH_MOBILE_SDHI_SCC_DTCNTL_TAPEN |
> - 0x4 << SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_SHIFT);
> + sd_scc_read32(host, priv,
> + SH_MOBILE_SDHI_SCC_DTCNTL));
>
> /* Avoid bad TAP */
> if (bad_taps & BIT(priv->tap_set)) {
> --
> 2.30.2
>
