Re: [PATCH] mmc: renesas_sdhi: special 4tap settings only apply to HS400

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Hi Wolfram,

On Fri, Apr 1, 2022 at 11:49 PM Wolfram Sang
<wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote:
> Previous doucmentation was vague, so we included SDR104 for slow SDnH
> clock settings. It turns out now, that it is only needed for HS400.
>
> Fixes: bb6d3fa98a41 ("clk: renesas: rcar-gen3: Switch to new SD clock handling")
> Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>

(after fixing the typo)
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>

> --- a/drivers/mmc/host/renesas_sdhi_core.c
> +++ b/drivers/mmc/host/renesas_sdhi_core.c
> @@ -144,9 +144,9 @@ static unsigned int renesas_sdhi_clk_update(struct tmio_mmc_host *host,
>                 return clk_get_rate(priv->clk);
>
>         if (priv->clkh) {
> +               /* HS400 with 4TAP needs different clock settings */
>                 bool use_4tap = priv->quirks && priv->quirks->hs400_4taps;
> -               bool need_slow_clkh = (host->mmc->ios.timing == MMC_TIMING_UHS_SDR104) ||
> -                                     (host->mmc->ios.timing == MMC_TIMING_MMC_HS400);
> +               bool need_slow_clkh = host->mmc->ios.timing == MMC_TIMING_MMC_HS400;

I'm wondering if we've lost the critical mass for keeping the bools?

>                 clkh_shift = use_4tap && need_slow_clkh ? 1 : 2;

Unfortunately I don't see a good way to rewrite this, without inflating
source code size...

>                 ref_clk = priv->clkh;
>         }

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



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