On Mon, 4 Apr 2022 at 12:05, Wolfram Sang
<wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote:
>
> Previous documentation was vague, so we included SDR104 for slow SDnH
> clock settings. It turns out now, that it is only needed for HS400.
>
> Fixes: bb6d3fa98a41 ("clk: renesas: rcar-gen3: Switch to new SD clock handling")
> Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
Applied for fixes, thanks!
Kind regards
Uffe
> ---
>
> Chages since v1:
> * fixed typo in the commit message (Shimoda-san)
> * added review tag
>
> drivers/mmc/host/renesas_sdhi_core.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
> index fe63548d816d..89d21231ec5f 100644
> --- a/drivers/mmc/host/renesas_sdhi_core.c
> +++ b/drivers/mmc/host/renesas_sdhi_core.c
> @@ -142,9 +142,9 @@ static unsigned int renesas_sdhi_clk_update(struct tmio_mmc_host *host,
> return clk_get_rate(priv->clk);
>
> if (priv->clkh) {
> + /* HS400 with 4TAP needs different clock settings */
> bool use_4tap = priv->quirks && priv->quirks->hs400_4taps;
> - bool need_slow_clkh = (host->mmc->ios.timing == MMC_TIMING_UHS_SDR104) ||
> - (host->mmc->ios.timing == MMC_TIMING_MMC_HS400);
> + bool need_slow_clkh = host->mmc->ios.timing == MMC_TIMING_MMC_HS400;
> clkh_shift = use_4tap && need_slow_clkh ? 1 : 2;
> ref_clk = priv->clkh;
> }
> --
> 2.30.2
>
