Hi,
On Wed, Mar 2, 2022 at 5:52 PM Peter Geis <pgwipeout@xxxxxxxxx> wrote:
>
> The Rockchip ciu clock cannot be set as low as the dw-mmc hardware
> supports. This leads to a situation during card initialization where the
> ciu clock is set lower than the clock driver can support. The
> dw-mmc-rockchip driver spews errors when this happens.
> For normal operation this only happens a few times during boot, but when
> cd-broken is enabled (in cases such as the SoQuartz module) this fires
> multiple times each poll cycle.
>
> Fix this by testing the minimum frequency the clock driver can support
> that is within the mmc specification, then divide that by the internal
> clock divider. Set the f_min frequency to this value, or if it fails,
> set f_min to the downstream driver's default.
>
> Fixes: f629ba2c04c9 ("mmc: dw_mmc: add support for RK3288")
I don't spend tons of time either Rockchip or dw-mmc these days, but
your email tickled a memory in my mind and I swore that I remember
this whole 400 kHz minimum thing, though I never dug into it myself.
It actually looks like the 400 kHz minimum disappeared sometime in
2016! See commit 6a8883d614c7 ("ARM: dts: rockchip: replace to
"max-frequency" instead of "clock-freq-min-max"") which only accounted
for the high end, not the low end?
I'm pretty sure I've tested on veyron since then, though and I didn't
see any errors, but perhaps this is because I was never using
cd-broken and the 400 kHz always worked?
-Doug
