On 12/27/21 7:31 AM, Krzysztof Kozlowski wrote:
Hi, Partial cleanup of Altera/Intel ARMv7 and ARMv8 DTS and bindings. The patches are independent, unless touching same files (e.g. bindings/arm/altera.yaml). Best regards, Krzysztof Krzysztof Kozlowski (19): dt-bindings: vendor-prefixes: add Enclustra dt-bindings: altera: document existing Cyclone 5 board compatibles dt-bindings: altera: document Arria 5 based board compatibles dt-bindings: altera: document Arria 10 based board compatibles dt-bindings: altera: document VT compatibles dt-bindings: altera: document Stratix 10 based board compatibles dt-bindings: intel: document Agilex based board compatibles dt-bindings: clock: intel,stratix10: convert to dtschema dt-bindings: mmc: synopsys-dw-mshc: integrate Altera and Imagination ARM: dts: arria5: add board compatible for SoCFPGA DK ARM: dts: arria10: add board compatible for Mercury AA1 ARM: dts: arria10: add board compatible for SoCFPGA DK arm64: dts: stratix10: add board compatible for SoCFPGA DK arm64: dts: stratix10: move ARM timer out of SoC node arm64: dts: stratix10: align mmc node names with dtschema arm64: dts: stratix10: align regulator node names with dtschema arm64: dts: agilex: add board compatible for SoCFPGA DK arm64: dts: agilex: add board compatible for N5X DK arm64: dts: agilex: align mmc node names with dtschema .../devicetree/bindings/arm/altera.yaml | 46 ++++++++++++++++--- .../bindings/arm/intel,socfpga.yaml | 26 +++++++++++ .../bindings/clock/intc_stratix10.txt | 20 -------- .../bindings/clock/intel,stratix10.yaml | 35 ++++++++++++++ .../devicetree/bindings/mmc/img-dw-mshc.txt | 28 ----------- .../bindings/mmc/socfpga-dw-mshc.txt | 23 ---------- .../bindings/mmc/synopsys-dw-mshc.yaml | 5 +- .../devicetree/bindings/vendor-prefixes.yaml | 2 + .../boot/dts/socfpga_arria10_mercury_aa1.dts | 2 +- arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 2 +- arch/arm/boot/dts/socfpga_arria5_socdk.dts | 2 +- .../boot/dts/altera/socfpga_stratix10.dtsi | 21 +++++---- .../dts/altera/socfpga_stratix10_socdk.dts | 3 +- .../altera/socfpga_stratix10_socdk_nand.dts | 3 +- arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 2 +- .../boot/dts/intel/socfpga_agilex_socdk.dts | 1 + .../dts/intel/socfpga_agilex_socdk_nand.dts | 1 + .../boot/dts/intel/socfpga_n5x_socdk.dts | 1 + 18 files changed, 129 insertions(+), 94 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/intel,socfpga.yaml delete mode 100644 Documentation/devicetree/bindings/clock/intc_stratix10.txt create mode 100644 Documentation/devicetree/bindings/clock/intel,stratix10.yaml delete mode 100644 Documentation/devicetree/bindings/mmc/img-dw-mshc.txt delete mode 100644 Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt
Applied for all SoCFPGA patches. Thanks, Dinh
