From: "fred.ai" <fred.ai@xxxxxxxxxxxxxx>
Driver will set PLL frequency by different card mode
1.SD2.0 and SDR50 card mode base clock frequency is 208MHz
2.SDR104 card mode base clock frequency is 200MHz
Signed-off-by: fred.ai <fred.ai@xxxxxxxxxxxxxx>
Change in V2:
---
After SD2.0 or SDR50 card initlization, driver will select base clock frequency 200MHz
by setting PLL frequency value 0x2510.
---
drivers/mmc/host/sdhci-pci-o2micro.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c
index 98c1a17eb619..4d79fda10dcb 100644
--- a/drivers/mmc/host/sdhci-pci-o2micro.c
+++ b/drivers/mmc/host/sdhci-pci-o2micro.c
@@ -569,8 +569,16 @@ static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock)
if ((host->timing == MMC_TIMING_UHS_SDR104) && (clock == 200000000)) {
pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32);
+ /* SDR104 card mode PLL frequency value is 0x2c28 */
if ((scratch_32 & 0xFFFF0000) != 0x2c280000)
o2_pci_set_baseclk(chip, 0x2c280000);
+
+ } else {
+ pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32);
+
+ /* SD2.0,SDR50 card mode PLL frequency value is 0X2510 */
+ if ((scratch_32 & 0xFFFF0000) != 0x2510000)
+ o2_pci_set_baseclk(chip, 0x25100000);
}
pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);
--
2.32.0
