On Thu, 2021-09-30 at 11:59 +0300, Adrian Hunter wrote: > On 30/09/2021 11:34, Bean Huo wrote: > > Hi Adrian, > > > > > > Thanks. > > I want to give a short conclusion for our discussion: > > > > Based on your information, these sounds disable of HW timer timeout > > interrupt will make eMMC host controller malfunction, in another > > word, > > the disable of timeout interrupt will make the eMMC host cannot > > correctly provide the completion interrupt. And unless only when > > the > > SOC vendor signals that their SOC supports that the host side SW > > can > > disable this HW timeout interrupt, as TI does. > > > > I studied the SDHCI Spec, and tried to see if there is this kind of > > support statement, but not been found yet. I will check with other > > SOC > > vendors. > > > > I have one more question, if you know, please give me your > > information. > > > > I did testing on HW timer bahevior in case CQE is on. Currently, > > we > > always set the HW timer with the maximum timeout value if CQE is > > on. > > Based on my testing, the HW timer will never timeout when we enable > > CQE. I changed the HW timer value to be lower, it is the same > > result. > > Do you know that the HW timer will be inactivated in case CQE is > > on? but its timeout interrupt is still enabled. > > No I don't know how different CQE handle timeouts. Thanks anyway. Bean > > > Kind regards, > > Bean > >
