On 7/14/21 8:49 PM, Vincent Whitchurch wrote: > On Thu, Jul 01, 2021 at 12:06:31AM +0200, Jaehoon Chung wrote: >> On 6/30/21 7:22 PM, Vincent Whitchurch wrote: >>> When a Data CRC interrupt is received, the driver disables the DMA, then >>> sends the stop/abort command and then waits for Data Transfer Over. >>> >>> However, sometimes, when a data CRC error is received in the middle of a >>> multi-block write transfer, the Data Transfer Over interrupt is never >>> received, and the driver hangs and never completes the request. >>> >>> The driver sets the BMOD.SWR bit (SDMMC_IDMAC_SWRESET) when stopping the >>> DMA, but according to the manual CMD.STOP_ABORT_CMD should be programmed >>> "before assertion of SWR". Do these operations in the recommended >>> order. With this change the Data Transfer Over is always received >>> correctly in my tests. >> >> I will check with your patch. I didn't see any CRC error on my targets before. > > Have you had a chance to check it? You can use the fault-injection > patch if you want to trigger aborted transfers without getting real CRC > errors: > > https://protect2.fireeye.com/v1/url?k=96c33914-c958001f-96c2b25b-002590f5b904-9a89d187f33934b7&q=1&e=308eae3a-44b8-43d7-be54-24e9b850f4ad&u=https%3A%2F%2Flore.kernel.org%2Flinux-mmc%2F20210701080534.23138-1-vincent.whitchurch%40axis.com%2F >
