Re: [PATCH v3 3/3] mmc: renesas_sdhi: do hard reset if possible

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> BTW, does it work (really) fine on R-Car Gen3? Mine does.

Yes, mine does, too. So, I first wondered if the difference is an older
SCC variant. But when I let the timeouts run for a while, I get a DMA
problem. Which could also be the difference between Gen2 and Gen3 here:

[   53.328284] WARNING: CPU: 0 PID: 743 at kernel/dma/debug.c:498 add_dma_entry+0x158/0x180
[   53.336397] DMA-API: exceeded 7 overlapping mappings of cacheline 0x011807bc
[   53.343451] Modules linked in:
[   53.346512] CPU: 0 PID: 743 Comm: kworker/0:7 Tainted: G        W         5.13.0-rc6-00061-g639f0f876ccf-dirty #1152
[   53.357046] Hardware name: Generic R-Car Gen2 (Flattened Device Tree)
[   53.363493] Workqueue: events_freezable mmc_rescan
[   53.368299] Backtrace: 
[   53.370749] [<c0523e08>] (dump_backtrace) from [<c05241d0>] (show_stack+0x20/0x24)
[   53.378337]  r7:c1da1aec r6:00000000 r5:00000009 r4:c0707df7
[   53.383998] [<c05241b0>] (show_stack) from [<c05262b4>] (dump_stack+0x28/0x30)
[   53.391232] [<c052628c>] (dump_stack) from [<c011754c>] (__warn+0xcc/0xf8)
[   53.398119]  r5:00000009 r4:c06fb973
[   53.401695] [<c0117480>] (__warn) from [<c05248c4>] (warn_slowpath_fmt+0x88/0xcc)
[   53.409191]  r9:ffffffff r8:c06fbc8b r7:00000009 r6:c0163e20 r5:000001f2 r4:c06fb973
[   53.416938] [<c0524840>] (warn_slowpath_fmt) from [<c0163e20>] (add_dma_entry+0x158/0x180)
[   53.425218]  r8:00000001 r7:4601ef3f r6:20000013 r5:011807bc r4:ffffffef
[   53.431921] [<c0163cc8>] (add_dma_entry) from [<c016541c>] (debug_dma_map_sg+0x214/0x330)
[   53.440115]  r6:c1135370 r5:c1b44410 r4:c1da1cd8
[   53.444732] [<c0165208>] (debug_dma_map_sg) from [<c015fe7c>] (dma_map_sg_attrs+0xb4/0xec)
[   53.453013]  r10:00000001 r9:00000000 r8:00000001 r7:c1da1cd8 r6:00000002 r5:c1b44410
[   53.460847]  r4:00000001
[   53.463380] [<c015fdc8>] (dma_map_sg_attrs) from [<c0490a60>] (renesas_sdhi_sys_dmac_start_dma+0xe0/0x3ec)
[   53.473055]  r8:c5e58d48 r7:c5dbf0ec r6:c1da1cd8 r5:00000001 r4:c1f73340
[   53.479758] [<c0490980>] (renesas_sdhi_sys_dmac_start_dma) from [<c048d7b4>] (tmio_process_mrq+0x134/0x274)
[   53.489519]  r10:c1da1d5c r9:00000001 r8:f082f014 r7:c1da1d20 r6:c1da1d5c r5:c1da1ce8
[   53.497353]  r4:c1f73340
[   53.499886] [<c048d680>] (tmio_process_mrq) from [<c048d9ac>] (tmio_mmc_request+0xb8/0xc4)
[   53.508168]  r9:c1da1ce8 r8:c06818f0 r7:60000013 r6:c1f73340 r5:c1da1d20 r4:c1f73000
[   53.515915] [<c048d8f4>] (tmio_mmc_request) from [<c0473c94>] (__mmc_start_request+0xb8/0x11c)
[   53.524544]  r7:00000040 r6:00000000 r5:c1da1d20 r4:c1f73000
[   53.530204] [<c0473bdc>] (__mmc_start_request) from [<c0473d8c>] (mmc_start_request+0x94/0xa8)
[   53.538831]  r7:00000040 r6:00000000 r5:c1da1d20 r4:c1f73000
[   53.544491] [<c0473cf8>] (mmc_start_request) from [<c0473eb4>] (mmc_wait_for_req+0x74/0xbc)
[   53.552858]  r7:00000040 r6:c1da1d30 r5:c1f73000 r4:c1da1d20
[   53.558518] [<c0473e40>] (mmc_wait_for_req) from [<c047a128>] (mmc_send_tuning+0x108/0x180)
[   53.566887]  r7:00000040 r6:c1da1dd8 r5:c601ef00 r4:c1f73000
[   53.572547] [<c047a020>] (mmc_send_tuning) from [<c0490448>] (renesas_sdhi_execute_tuning+0x2b4/0x440)
[   53.581874]  r10:c0738b11 r9:c5e58dd4 r8:00000013 r7:0000000b r6:c5e58d48 r5:c1f73340
[   53.589708]  r4:c1f73000
[   53.592241] [<c0490194>] (renesas_sdhi_execute_tuning) from [<c0474580>] (mmc_execute_tuning+0x70/0xa8)
[   53.601653]  r10:c0aaf1d4 r9:00000000 r8:00200000 r7:00000006 r6:c601b800 r5:c0490194
[   53.609487]  r4:c1f73000
[   53.612020] [<c0474510>] (mmc_execute_tuning) from [<c047c058>] (mmc_sd_init_uhs_card+0x310/0x3f4)
[   53.620995]  r7:00000006 r6:c601ec80 r5:00000000 r4:c601b800
[   53.626655] [<c047bd48>] (mmc_sd_init_uhs_card) from [<c047d0b8>] (mmc_sd_init_card+0x2a4/0x7e0)
[   53.635454]  r7:00000000 r6:c1f73000 r5:00000000 r4:c601b800

I haven't really an idea why SYS-DMAC here is different that internal
DMAC. This needs investigation.

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