On Thu, 20 May 2021, at 19:43, Steven Lee wrote: > The hardware provides capability configuration registers for each SDHCI > in the global configuration space for the SD controller. Writes to the > global capability registers are mirrored to the capability registers in > the associated SDHCI. Configuration of the capabilities must be written > through the mirror registers prior to initialisation of the SDHCI. > > Signed-off-by: Steven Lee <steven_lee@xxxxxxxxxxxxxx> Reviewed-by: Andrew Jeffery <andrew@xxxxxxxx>
