On Fri, 9 Apr 2021 at 11:46, Wolfram Sang
<wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote:
>
> Now that we got the timeout handling in the driver correct, we can use
> this capability to avoid polling via the MMC core.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
Applied for next, thanks!
Kind regards
Uffe
> ---
>
> Change since v1:
> * moved wrongly set flags from tmio_flags to capabilities
>
> drivers/mmc/host/renesas_sdhi_internal_dmac.c | 4 ++--
> drivers/mmc/host/renesas_sdhi_sys_dmac.c | 8 +++++---
> 2 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
> index ff97f15e317c..e8f4863d8f1a 100644
> --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
> +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
> @@ -97,7 +97,7 @@ static const struct renesas_sdhi_of_data of_rza2_compatible = {
> TMIO_MMC_HAVE_CBSY,
> .tmio_ocr_mask = MMC_VDD_32_33,
> .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
> - MMC_CAP_CMD23,
> + MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY,
> .bus_shift = 2,
> .scc_offset = 0 - 0x1000,
> .taps = rcar_gen3_scc_taps,
> @@ -111,7 +111,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
> .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
> TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
> .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
> - MMC_CAP_CMD23,
> + MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY,
> .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT | MMC_CAP2_MERGE_CAPABLE,
> .bus_shift = 2,
> .scc_offset = 0x1000,
> diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
> index c5f789675302..ffa64211f4de 100644
> --- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c
> +++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c
> @@ -33,12 +33,14 @@ static const struct renesas_sdhi_of_data of_rz_compatible = {
> .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT |
> TMIO_MMC_HAVE_CBSY,
> .tmio_ocr_mask = MMC_VDD_32_33,
> - .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
> + .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
> + MMC_CAP_WAIT_WHILE_BUSY,
> };
>
> static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
> .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL,
> - .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
> + .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
> + MMC_CAP_WAIT_WHILE_BUSY,
> .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
> };
>
> @@ -58,7 +60,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
> .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
> TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
> .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
> - MMC_CAP_CMD23,
> + MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY,
> .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
> .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
> .dma_rx_offset = 0x2000,
> --
> 2.30.0
>
