Hi Eric, I've followed your work to integrate fscrypt for an eMMC, and now that it's been merged started to write the support for the Allwinner H6 [1] that has an encryption / decryption engine (EMCE, page 332) for the eMMC controller (page 495). I have some code that does most of the work to enable it and I'm at a point where I can run xfstests (so the accesses seem to go through the crypto engine, and they decrypt something), but the content of the files are off compared to the software implementation. My first guess would be to check how the key is setup in the hardware, but it's where I'm not really sure what's going on. It looks from the cqhci driver that the AES-XTS key has twice the size, and it's written in two steps for some reason? [2] Since the AES-XTS key size allegedly supported by the driver is 256 bits but the key size is 64 bytes, the comment makes sense, but I'm not really sure what is happening and what I'm supposed to be doing with that key. Thanks! Maxime 1: http://files.pine64.org/doc/datasheet/pine-h64/Allwinner_H6%20V200_User_Manual_V1.1.pdf 2: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/mmc/host/cqhci-crypto.c#n92
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