RE: [PATCH V3 4/5] dt-bindings: mmc: fsl-imx-esdhc: add clock bindings

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Hi Rob,

> From: Peng Fan (OSS) <peng.fan@xxxxxxxxxxx>
> Sent: Thursday, February 25, 2021 11:10 AM
> 
> From: Peng Fan <peng.fan@xxxxxxx>
> 
> Add clock bindings for fsl-imx-esdhc yaml
> 
> Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
> ---
>  .../devicetree/bindings/mmc/fsl-imx-esdhc.yaml        | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> index a7fbd8cc1e38..369471814496 100644
> --- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> +++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> @@ -103,6 +103,17 @@ properties:
>        Only eMMC HS400 mode need to take care of this property.
>      default: 0
> 
> +  clocks:
> +    maxItems: 3
> +    description:
> +      Handle clocks for the sdhc controller.
> +
> +  clock-names:
> +    items:
> +      - const: ipg
> +      - const: ahb
> +      - const: per

One question:
The side effect of this patch is that it imposes a forced order of clk names
In DT which actually was not needed.

Do we really have to do that?

Or any other better approach to allow a random order to match the DT
usage better?

Regards
Aisheng

> +
>    pinctrl-names:
>      minItems: 1
>      maxItems: 4
> --
> 2.30.0





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