Hi Lucas, On Tue, Jan 5, 2021 at 12:06 PM Lucas Stach <l.stach@xxxxxxxxxxxxxx> wrote: > The reference manual states about this situation: "For any clock, its > source must be left on when it is kept on. Behavior is undefined if > this rule is violated." > And it seems this is exactly what's happening here: some kind of glitch > is introduced in the nand_usdhc_bus clock, which prevents the SDHCI > controller from working, even though the clock branch is properly > enabled later on. On my system the SDHCI timeout and following runtime > suspend/resume cycle on the nand_usdhc_bus clock seem to get it back > into a working state. I think your analysis is correct and I recall helping a customer with a similar issue: https://community.nxp.com/t5/i-MX-Processors/External-clock-that-provide-root-clock-for-SAI3-and-SPDIF/m-p/1019834 Regards, Fabio Estevam
