On 23/09/20 4:22 pm, Faiz Abbas wrote: > With the new SW tuning App note[1], a custom tuning algorithm is > required for eMMC HS200, HS400 and SD card UHS modes. The algorithm > involves running through the 32 possible input tap delay values and > sending the appropriate tuning command (CMD19/21) for each of them > to get a fail or pass result for each of the values. Typically, the > range will have a small contiguous failing window. Considering the > tuning range as a circular buffer, the algorithm then sets a final > tuned value directly opposite to the failing window. > > [1] https://www.ti.com/lit/pdf/spract9 > > Signed-off-by: Faiz Abbas <faiz_abbas@xxxxxx> Reviewed-by: Kishon Vijay Abraham I <kishon@xxxxxx> > --- > drivers/mmc/host/sdhci_am654.c | 41 ++++++++++++++++++++++++++++++++++ > 1 file changed, 41 insertions(+) > > diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c > index 1213b711e60a..5af7638ad606 100644 > --- a/drivers/mmc/host/sdhci_am654.c > +++ b/drivers/mmc/host/sdhci_am654.c > @@ -396,7 +396,46 @@ static u32 sdhci_am654_cqhci_irq(struct sdhci_host *host, u32 intmask) > return 0; > } > > +#define ITAP_MAX 32 > +static int sdhci_am654_platform_execute_tuning(struct sdhci_host *host, > + u32 opcode) > +{ > + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); > + struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host); > + int cur_val, prev_val = 1, fail_len = 0, pass_window = 0, pass_len; > + u32 itap; > + > + /* Enable ITAPDLY */ > + regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPDLYENA_MASK, > + 1 << ITAPDLYENA_SHIFT); > + > + for (itap = 0; itap < ITAP_MAX; itap++) { > + sdhci_am654_write_itapdly(sdhci_am654, itap); > + > + cur_val = !mmc_send_tuning(host->mmc, opcode, NULL); > + if (cur_val && !prev_val) > + pass_window = itap; > + > + if (!cur_val) > + fail_len++; > + > + prev_val = cur_val; > + } > + /* > + * Having determined the length of the failing window and start of > + * the passing window calculate the length of the passing window and > + * set the final value halfway through it considering the range as a > + * circular buffer > + */ > + pass_len = ITAP_MAX - fail_len; > + itap = (pass_window + (pass_len >> 1)) % ITAP_MAX; > + sdhci_am654_write_itapdly(sdhci_am654, itap); > + > + return 0; > +} > + > static struct sdhci_ops sdhci_am654_ops = { > + .platform_execute_tuning = sdhci_am654_platform_execute_tuning, > .get_max_clock = sdhci_pltfm_clk_get_max_clock, > .get_timeout_clock = sdhci_pltfm_clk_get_max_clock, > .set_uhs_signaling = sdhci_set_uhs_signaling, > @@ -426,6 +465,7 @@ static const struct sdhci_am654_driver_data sdhci_am654_drvdata = { > }; > > static struct sdhci_ops sdhci_j721e_8bit_ops = { > + .platform_execute_tuning = sdhci_am654_platform_execute_tuning, > .get_max_clock = sdhci_pltfm_clk_get_max_clock, > .get_timeout_clock = sdhci_pltfm_clk_get_max_clock, > .set_uhs_signaling = sdhci_set_uhs_signaling, > @@ -449,6 +489,7 @@ static const struct sdhci_am654_driver_data sdhci_j721e_8bit_drvdata = { > }; > > static struct sdhci_ops sdhci_j721e_4bit_ops = { > + .platform_execute_tuning = sdhci_am654_platform_execute_tuning, > .get_max_clock = sdhci_pltfm_clk_get_max_clock, > .get_timeout_clock = sdhci_pltfm_clk_get_max_clock, > .set_uhs_signaling = sdhci_set_uhs_signaling, >
