On Wed, Apr 15, 2020 at 04:16:04PM +0300, Adrian Hunter wrote: > On 2/04/20 2:54 pm, Michał Mirosław wrote: > > Move clock frequency limit for SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN where > > it belongs. > > Did you consider getting rid of SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN and > handling it in sdhci-of-arasan instead? I'm expecting to use this quirk for DDR mode support in other host drivers, but I can't test this, yet. Best Regards, Michał Mirosław
