> -----Original Message-----
> From: Ulf Hansson <ulf.hansson@xxxxxxxxxx>
> Sent: Wednesday, March 18, 2020 7:08 PM
> To: Wan Mohamad, Wan Ahmad Zainie
> <wan.ahmad.zainie.wan.mohamad@xxxxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>; Mark Rutland
> <mark.rutland@xxxxxxx>; Hunter, Adrian <adrian.hunter@xxxxxxxxx>;
> linux-mmc@xxxxxxxxxxxxxxx; DTML <devicetree@xxxxxxxxxxxxxxx>
> Subject: Re: [PATCH 1/2] dt-bindings: mmc: arasan: Add compatible strings
> for Intel Keem Bay
>
> On Mon, 16 Mar 2020 at 10:13, Wan Ahmad Zainie
> <wan.ahmad.zainie.wan.mohamad@xxxxxxxxx> wrote:
> >
> > Add new compatible strings in sdhci-of-arasan.c to support Intel Keem
> > Bay eMMC/SD/SDIO controller, based on Arasan SDHCI 5.1.
> >
> > Signed-off-by: Wan Ahmad Zainie
> > <wan.ahmad.zainie.wan.mohamad@xxxxxxxxx>
> > ---
> > .../devicetree/bindings/mmc/arasan,sdhci.txt | 39
> > +++++++++++++++++++
>
> We are starting to reach a point were I want to see people converting
> bindings into the yaml format, rather than extending the existing text based
> ones.
>
> Can you please have a look at the sdhci common bindings and the sdhci
> arasan variant, that would be a good start.
Yes, I can start by converting arasan,sdhci.txt.
>
> Kind regards
> Uffe
>
> > 1 file changed, 39 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> > b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> > index 428685eb2ded..50f9cc0eff2a 100644
> > --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> > +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> > @@ -24,6 +24,10 @@ Required Properties:
> > For this device it is strongly suggested to include arasan,soc-ctl-syscon.
> > - "intel,lgm-sdhci-5.1-sdxc", "arasan,sdhci-5.1": Intel LGM SDXC PHY
> > For this device it is strongly suggested to include arasan,soc-ctl-syscon.
> > + - "intel,keembay-sdhci-5.1-emmc", "arasan,sdhci-5.1": Keem Bay
> eMMC PHY
> > + For this device it is strongly suggested to include arasan,soc-ctl-syscon.
> > + - "intel,keembay-sdhci-5.1-sd": Keem Bay SD controller
> > + - "intel,keembay-sdhci-5.1-sdio": Keem Bay SDIO controller
> >
> > [5] Documentation/devicetree/bindings/mmc/sdhci-am654.txt
> >
> > @@ -133,3 +137,38 @@ Example:
> > phy-names = "phy_arasan";
> > arasan,soc-ctl-syscon = <&sysconf>;
> > };
> > +
> > + mmc: mmc@33000000 {
> > + compatible = "intel,keembay-sdhci-5.1-emmc", "arasan,sdhci-5.1";
> > + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> > + reg = <0x0 0x33000000 0x0 0x300>;
> > + clock-names = "clk_xin", "clk_ahb";
> > + clocks = <&scmi_clk KEEM_BAY_PSS_AUX_EMMC>,
> > + <&scmi_clk KEEM_BAY_PSS_EMMC>;
> > + phys = <&emmc_phy>;
> > + phy-names = "phy_arasan";
> > + assigned-clocks = <&scmi_clk KEEM_BAY_PSS_AUX_EMMC>;
> > + clock-output-names = "emmc_cardclock";
> > + #clock-cells = <0>;
> > + arasan,soc-ctl-syscon = <&mmc_phy_syscon>;
> > + };
> > +
> > + sd0: sdhci@31000000 {
> > + compatible = "intel,keembay-sdhci-5.1-sd";
> > + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> > + reg = <0x0 0x31000000 0x0 0x300>;
> > + clock-names = "clk_xin", "clk_ahb";
> > + clocks = <&scmi_clk KEEM_BAY_PSS_AUX_SD0>,
> > + <&scmi_clk KEEM_BAY_PSS_SD0>;
> > + arasan,soc-ctl-syscon = <&sd0_phy_syscon>;
> > + };
> > +
> > + sd1: sdhci@32000000 {
> > + compatible = "intel,keembay-sdhci-5.1-sdio";
> > + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
> > + reg = <0x0 0x32000000 0x0 0x300>;
> > + clock-names = "clk_xin", "clk_ahb";
> > + clocks = <&scmi_clk KEEM_BAY_PSS_AUX_SD1>,
> > + <&scmi_clk KEEM_BAY_PSS_SD1>;
> > + arasan,soc-ctl-syscon = <&sd1_phy_syscon>;
> > + };
> > --
> > 2.17.1
> >
