Hello, this is the patchset for a driver for the Amlogic "SDHC" MMC controller found on Meson6, Meson8, Meson8b and Meson8m2 SoCs. The public S805 (Meson8b) datasheet has some documentation starting on page 74: [0] It's performance is still not as good as the driver from Amlogic's 3.10 kernel, but it does not corrupt data anymore (as RFC v1 did). Special thanks to the people who supported me off-list - you are amazing and deserve to be mentioned here: - Xin Yin who helped me fix two more write corruption problems. I am hoping that he will reply with Reviewed-by, Tested-by and Bug-fixed-by - Jianxin Pan for sharing some of the internal workings of this MMC controller with me - Wei Wang for spotting the initial write corruption problem and helping test this driver on his board. I have his permission to add his Tested-by (off-list, he's Cc'ed so if there's any problem he can speak up) Changes since v3 at [3]: - split the clock bits into a separate clock controller driver because of two reasons: 1) it keeps the MMC controller driver mostly clean of the clock bits 2) the pure clock controller can use devm_clk_hw_register() (instead of devm_clk_register(), which is deprecated) and the MMC controller can act as a pure clock consumer. This also affects the dt-bindings which is why I dropped Rob's Reviewed-by. Thanks to Ulf for the suggestions Changes since v2 at [2]: - rebased on top of v5.5-rc1 - added Rob's and Xin Yin's Reviewed-by and Tested-by (thank you!) - (note: Kevin had v2 of this series in -next for a few days so the build test robots could play with it. I haven't received any negative feedback in that time) Changes since RFC v1 at [1]: - don't set MESON_SDHC_MISC_MANUAL_STOP to fix one of three write corruption problems. the out-of-tree 3.10 "reference" driver doesn't set it either - check against data->flags instead of cmd->flags when testing for MMC_DATA_WRITE as spotted by Xin Yin (many thanks!). This fixes another write corruption problem - clear the FIFOs after successfully transferring data as suggested by Xin Yin (many thanks!). This is what the 3.10 driver did and fixes yet another write corruption problem - integrate the clock suggestions from Jianxin Pan so the driver is now able to set up the clocks correctly for all known cases. documentation is also added to the patch description. Thank you Jianxin for the help! - set the correct max_busy_timeout as suggested by Jianxin Pan (thanks!) - convert the dt-bindings to .yaml (which is why I didn't add Rob's Reviewed-by) - switch to struct clk_parent_data as part of newer common clock framework APIs to simplify the clock setup - dropped CMD23 support because it seems to hurt read and write performance by 10-20% in my tests. it's not clear why, but for now we can live without this. - use devm_platform_ioremap_resource instead of open-coding it [0] https://dn.odroid.com/S805/Datasheet/S805_Datasheet%20V0.8%2020150126.pdf [1] https://patchwork.kernel.org/cover/11035505/ [2] http://lists.infradead.org/pipermail/linux-amlogic/2019-November/014576.html [3] https://patchwork.kernel.org/cover/11283179/ Martin Blumenstingl (3): dt-bindings: mmc: Document the Amlogic Meson SDHC MMC host controller clk: meson: add a driver for the Meson8/8b/8m2 SDHC clock controller mmc: host: meson-mx-sdhc: new driver for the Amlogic Meson SDHC host .../bindings/mmc/amlogic,meson-mx-sdhc.yaml | 83 ++ drivers/clk/meson/Kconfig | 9 + drivers/clk/meson/Makefile | 1 + drivers/clk/meson/meson-mx-sdhc.c | 212 ++++ drivers/mmc/host/Kconfig | 14 + drivers/mmc/host/Makefile | 1 + drivers/mmc/host/meson-mx-sdhc.c | 1064 +++++++++++++++++ .../dt-bindings/clock/meson-mx-sdhc-clkc.h | 8 + 8 files changed, 1392 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml create mode 100644 drivers/clk/meson/meson-mx-sdhc.c create mode 100644 drivers/mmc/host/meson-mx-sdhc.c create mode 100644 include/dt-bindings/clock/meson-mx-sdhc-clkc.h -- 2.24.1
