Rob Herring <robh@xxxxxxxxxx> 于2019年12月14日周六 上午7:01写道： > > On Mon, Dec 02, 2019 at 10:41:02PM +0800, Jun Nie wrote: > > DMA memory cannot cross specific boundary on some controller, such as 128MB > > on SDHCI Designware. Add sdhci-dma-mem-boundary property to split DMA > > operation in such case. > > > > sdhci-ctrl-hs400 specify the HS400 mode setting for register > > SDHCI_HOST_CONTROL2(offset 0x3E:bit[2:0]). Because this value is not > > defined in SDHC Standard specification. > > > > Signed-off-by: Jun Nie <jun.nie@xxxxxxxxxx> > > --- > > Documentation/devicetree/bindings/mmc/sdhci.txt | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/mmc/sdhci.txt b/Documentation/devicetree/bindings/mmc/sdhci.txt > > index 0e9923a64024..e6d7feb9a741 100644 > > --- a/Documentation/devicetree/bindings/mmc/sdhci.txt > > +++ b/Documentation/devicetree/bindings/mmc/sdhci.txt > > @@ -11,3 +11,11 @@ Optional properties: > > - sdhci-caps: The sdhci capabilities register is incorrect. This 64bit > > property corresponds to the bits in the sdhci capability register. If the > > bit is on in the property then the bit should be turned on. > > +- sdhci-dma-mem-boundary: The sdhci controller DMA memory space boundary. > > + If the controller's DMA cannot cross a specific memory space boundary, > > + such as 128MB, set this value in dt and driver will split the DMA > > + operation when crossing such boundary. > > This should be implied by the compatible string. > > > +- sdhci-ctrl-hs400: The HS400 is not defined in SDHC Standard specification > > + for SDHCI_HOST_CONTROL2(offset 0x3E:bit[2:0]). Different controllers have > > + have different value for HS400 mode. If 0x5 is not the HS400 mode value > > + for your controller, you should specify the value with this property. > > This too, unless it needs to be tuned per board. > > Can you be more specific as to what the possible values are and what > they do? It is specific to SoC or specific to controller. HS400 mode value on DWC3 of new Hisilicon SoC is 7, not 5. This same is to DMA buffer memory address boundary. Do you mean you want the boundary value and HS400 mode value should bundled with compatible, ie. specific SoC or controller, to set a value in sdhci layer from platform glue driver? > > Rob
