On Mon, 2 Dec 2019 at 23:28, Linus Walleij <linus.walleij@xxxxxxxxxx> wrote: > > For the ux500v2 variant of the PL18x block, odd block sizes > are supported. This is necessary to support some SDIO > transfers. This also affects the QCOM MMCI variant and the > ST micro variant. > > For Ux500 an additional quirk only allowing DMA on blocks > that are a power of two is needed. This might be a bug in > the DMA engine (DMA40) or the MMCI or in the interconnect, > but the most likely is the MMCI, as transfers of these > sizes work fine for other devices using the same DMA > engine. DMA works fine also with SDIO as long as the > blocksize is a power of 2. > > This patch has proven necessary for enabling SDIO for WLAN on > PostmarketOS-based Ux500 platforms. > > What we managed to test in practice is Broadcom WiFi over > SDIO on the Ux500 based Samsung GT-I8190 and GT-S7710. > This WiFi chip, BCM4334 works fine after the patch. > > Before this patch: > > brcmfmac: brcmf_fw_alloc_request: using brcm/brcmfmac4334-sdio > for chip BCM4334/3 > mmci-pl18x 80118000.sdi1_per2: unsupported block size (60 bytes) > brcmfmac: brcmf_sdiod_ramrw: membytes transfer failed > brcmfmac: brcmf_sdio_download_code_file: error -22 on writing > 434236 membytes at 0x00000000 > brcmfmac: brcmf_sdio_download_firmware: dongle image file download > failed > > After this patch: > > brcmfmac: brcmf_c_preinit_dcmds: Firmware: BCM4334/3 wl0: > Nov 21 2012 00:21:28 version 6.10.58.813 (B2) FWID 01-0 > > Bringing up networks, discovering networks with "iw dev wlan0 scan" > and connecting works fine from this point. > > This patch is inspired by Ulf Hansson's patch > http://www.spinics.net/lists/linux-mmc/msg12160.html > > As the DMA engines on these platforms may now get block sizes > they were not used to before, make sure to also respect if > the DMA engine says "no" to a transfer. > > Make a drive-by fix for datactrl_blocksz, misspelled. Alright, I think this approach makes sense. Especially, trying to make some changes in mmci_pio_read|write() that we can trigger/test doesn't make sense. A few nitpicks below. > > Cc: Ludovic Barre <ludovic.barre@xxxxxx> > Cc: Brian Masney <masneyb@xxxxxxxxxxxxx> > Cc: Stephan Gerhold <stephan@xxxxxxxxxxx> > Cc: Niklas Cassel <niklas.cassel@xxxxxxxxxx> > Cc: Russell King <rmk+kernel@xxxxxxxxxxxxxxx> > Signed-off-by: Ulf Hansson <ulf.hansson@xxxxxxxxxx> > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxx> > Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx> > --- > ChangeLog v3->v4: > - Rewrite the patch to accept odd packages but only > let power of two packages pass on to the DMA. > - Drop the patches disallowing DMA not divisible by 4: > this doesn't work. Instead just push the whole > power of two criteria down to the DMA submission > phase. > - Drop the patch handling odd sglist offsets and > passing of page boundaries in SG buffers when > using PIO: it just doesn't happen in practice, we > don't know why, but likely because all packets are > small. > ChangeLog v2->v3: > - Repost with the inclusion of other patches. > ChangeLog v1->v2: > - Specify odd blocksize field to 1 bit (:1) > - Specify that STMMC supports odd block sizes > - Collect Stephan's test tag > --- [...] > diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h > index 833236ecb31e..37d02f147b4f 100644 > --- a/drivers/mmc/host/mmci.h > +++ b/drivers/mmc/host/mmci.h > @@ -278,7 +278,11 @@ struct mmci_host; > * @stm32_clkdiv: true if using a STM32-specific clock divider algorithm > * @datactrl_mask_ddrmode: ddr mode mask in datactrl register. > * @datactrl_mask_sdio: SDIO enable mask in datactrl register > - * @datactrl_blksz: block size in power of two > + * @datactrl_blocksz: block size in power of two > + * @datactrl_odd_blocksz: true if block any block sizes are accepted by > + * hardware, such as with some SDIO traffic that send > + * odd packets. > + * @only_pow_2_dma: DMA only works with blocks that are a power of 2. > * @datactrl_first: true if data must be setup before send command > * @datacnt_useless: true if you could not use datacnt register to read > * remaining data > @@ -323,6 +327,8 @@ struct variant_data { > unsigned int datactrl_mask_ddrmode; > unsigned int datactrl_mask_sdio; > unsigned int datactrl_blocksz; > + u8 datactrl_odd_blocksz:1; How about renaming this to datactrl_any_blocksz? As I think that better explains its purpose. > + u8 only_pow_2_dma:1; and rename this to dma_power_of_2 > u8 datactrl_first:1; > u8 datacnt_useless:1; > u8 st_sdio:1; > -- > 2.21.0 > Kind regards Uffe
