Hi, On 19/09/19 5:27 PM, Alan Cooper wrote: > This does correct the sequence of switching to HS400 but it might be > safest to just add this to the latest until it gets a little testing > to make sure it doesn't expose some bug in existing controllers. > > Thanks > Al > > On Tue, Sep 3, 2019 at 10:52 AM Ulf Hansson <ulf.hansson@xxxxxxxxxx> wrote: >> >> On Tue, 3 Sep 2019 at 13:51, Al Cooper <alcooperx@xxxxxxxxx> wrote: >>> >>> When switching from any MMC speed mode that requires 1.8v >>> (HS200, HS400 and HS400ES) to High Speed (HS) mode, the system >>> ends up configured for SDR12 with a 50MHz clock which is an illegal >>> mode. >>> >>> This happens because the SDHCI_CTRL_VDD_180 bit in the >>> SDHCI_HOST_CONTROL2 register is left set and when this bit is >>> set, the speed mode is controlled by the SDHCI_CTRL_UHS field >>> in the SDHCI_HOST_CONTROL2 register. The SDHCI_CTRL_UHS field >>> will end up being set to 0 (SDR12) by sdhci_set_uhs_signaling() >>> because there is no UHS mode being set. >>> >>> The fix is to change sdhci_set_uhs_signaling() to set the >>> SDHCI_CTRL_UHS field to SDR25 (which is the same as HS) for >>> any switch to HS mode. This change has broken High speed mode in SD card for me in AM65x-evm. I guess this change only needs to be done for eMMC. SDR25 is decidedly not the same as high speed for SD card. Thanks, Faiz
