On Sun, Nov 17, 2019 at 03:27:15PM +0100, Martin Blumenstingl wrote: > This documents the devicetree bindings for the SDHC MMC host controller > found in Meson6, Meson8, Meson8b and Meson8m2 SoCs. It can use a > bus-width of 1/4/8-bit and it supports eMMC spec 4.4x/4.5x including > HS200 mode (up to 100MHz clock). > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx> > --- > .../bindings/mmc/amlogic,meson-mx-sdhc.yaml | 64 +++++++++++++++++++ > 1 file changed, 64 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
