On Sun, Aug 25, 2019 at 05:05:58PM +0200, Alejandro González wrote: > Some Allwinner H6 boards have timing problems when dealing with > DDR-capable eMMC cards. These boards include the Pine H64 and Tanix TX6. > > These timing problems result in out of sync communication between the > driver and the eMMC, which renders the memory unsuable for every > operation but some basic commmands, like reading the status register. > > The cause of these timing problems is not yet well known, but they go > away by disabling DDR mode operation in the driver. Like on some H5 > boards, it might be that the traces are not precise enough to support > these speeds. However, Jernej Skrabec compared the BSP driver with this > driver, and found that the BSP driver configures pinctrl to operate at > 1.8 V when entering DDR mode (although 3.3 V operation is supported), while > the mainline kernel lacks any mechanism to switch voltages dynamically. > Finally, other possible cause might be some timing parameter that is > different on the H6 with respect to other SoCs. This should be a comment in the driver where this is disabled. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
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