RE: [PATCH] mmc: cqhci: clear the HALT bit in the first request when resume back

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> -----Original Message-----
> From: linux-mmc-owner@xxxxxxxxxxxxxxx
> [mailto:linux-mmc-owner@xxxxxxxxxxxxxxx] On Behalf Of Adrian Hunter
> Sent: 2019年2月25日 17:10
> To: BOUGH CHEN <haibo.chen@xxxxxxx>; riteshh@xxxxxxxxxxxxxx;
> asutoshd@xxxxxxxxxxxxxx; ulf.hansson@xxxxxxxxxx
> Cc: linux-mmc@xxxxxxxxxxxxxxx; dl-linux-imx <linux-imx@xxxxxxx>
> Subject: Re: [PATCH] mmc: cqhci: clear the HALT bit in the first request when
> resume back
> 
> On 25/02/19 11:01 AM, BOUGH CHEN wrote:
> > After system suspend, CQE is in cqhci_off state, which set the HALT
> > bit, make CQE in HALT state. If the SoC do not power down the USDHC
> > module, then when system resume back, this bit keep the same, still set.
> 
> Normally there is a sdhci reset during sdhci_resume_host().  Are you not
> doing a reset?  Or is the reset not resetting cqhci?
> 

Thanks for your quick reply!
Confirm with our IC guys, the reset do not reset cqhci on i.MX. So this is i.MX limitation,
I should move this change into cq_host->ops->enable, will send a V2 patch.


> >                                                        So need
> to
> > clear this bit when enable CQE for the first request after system
> > resume back. If not, CQE will stuck in the first CMDQ request after system
> resume back.
> >
> > Find this issue on NXP i.MX845s-mek board
> >
> > [  105.919862] mmc2: cqhci: timeout for tag 6 [  105.923965] mmc2:
> > cqhci: ============ CQHCI REGISTER DUMP ===========
> > [  105.930407] mmc2: cqhci: Caps:      0x0000310a | Version:
> 0x00000510
> > [  105.936847] mmc2: cqhci: Config:    0x00001001 | Control:
> 0x00000001
> > [  105.943286] mmc2: cqhci: Int stat:  0x00000000 | Int enab: 0x00000006
> > [  105.949725] mmc2: cqhci: Int sig:   0x00000006 | Int Coal: 0x00000000
> > [  105.956164] mmc2: cqhci: TDL base:  0x7809b000 | TDL up32:
> 0x00000000
> > [  105.962604] mmc2: cqhci: Doorbell:  0x00000040 | TCN:
> 0x00000000
> > [  105.969043] mmc2: cqhci: Dev queue: 0x00000000 | Dev Pend:
> 0x00000000
> > [  105.975483] mmc2: cqhci: Task clr:  0x00000000 | SSC1:
> 0x00011000
> > [  105.981922] mmc2: cqhci: SSC2:      0x00000001 | DCMD rsp:
> 0x00000000
> > [  105.988362] mmc2: cqhci: RED mask:  0xfdf9a080 | TERRI:
> 0x00000000
> > [  105.994801] mmc2: cqhci: Resp idx:  0x00000000 | Resp arg:
> > 0x00000000 [  106.001240] mmc2: sdhci: ============ SDHCI REGISTER
> > DUMP =========== [  106.007680] mmc2: sdhci: Sys addr:  0xb2b37800 |
> > Version:  0x00000002 [  106.014120] mmc2: sdhci: Blk size:  0x00000200
> > | Blk cnt:  0x00000001 [  106.020560] mmc2: sdhci: Argument:
> 0x00010000 | Trn mode: 0x00000013
> > [  106.026999] mmc2: sdhci: Present:   0x01f88008 | Host ctl: 0x00000030
> > [  106.033439] mmc2: sdhci: Power:     0x00000002 | Blk gap:
> 0x00000080
> > [  106.039878] mmc2: sdhci: Wake-up:   0x00000008 | Clock:
> 0x0000000f
> > [  106.046318] mmc2: sdhci: Timeout:   0x0000008f | Int stat: 0x00000000
> > [  106.052757] mmc2: sdhci: Int enab:  0x107f4000 | Sig enab:
> > 0x107f4000 [  106.059196] mmc2: sdhci: AC12 err:  0x00000000 | Slot int:
> 0x00000502
> > [  106.065635] mmc2: sdhci: Caps:      0x07eb0000 | Caps_1:
> 0x8000b407
> > [  106.072075] mmc2: sdhci: Cmd:       0x00000d1a | Max curr: 0x00ffffff
> > [  106.078514] mmc2: sdhci: Resp[0]:   0x00000900 | Resp[1]:
> 0x31360181
> > [  106.084954] mmc2: sdhci: Resp[2]:   0x44473430 | Resp[3]:
> 0x00450100
> > [  106.091392] mmc2: sdhci: Host ctl2: 0x00000008 [  106.095836] mmc2:
> > sdhci: ADMA Err:  0x00000000 | ADMA Ptr: 0x7804b208 [  106.102274]
> > mmc2: sdhci: ============================================
> > [  106.108785] mmc2: running CQE recovery
> >
> > Signed-off-by: Haibo Chen <haibo.chen@xxxxxxx>
> > ---
> >  drivers/mmc/host/cqhci.c | 6 ++++++
> >  1 file changed, 6 insertions(+)
> >
> > diff --git a/drivers/mmc/host/cqhci.c b/drivers/mmc/host/cqhci.c index
> > 159270e947cf..48550c572bb6 100644
> > --- a/drivers/mmc/host/cqhci.c
> > +++ b/drivers/mmc/host/cqhci.c
> > @@ -271,6 +271,12 @@ static void __cqhci_enable(struct cqhci_host
> > *cq_host)
> >
> >  	cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
> >
> > +	/* Clear halt and clear all tasks */
> > +	cqhci_writel(cq_host, 0, CQHCI_CTL);
> > +	if (cqhci_readl(cq_host, CQHCI_CTL) && CQHCI_HALT)
> > +		pr_err("%s: cqhci: failed to exit halt state when enable CQE\n",
> > +			mmc_hostname(mmc));
> > +
> >  	mmc->cqe_on = true;
> >
> >  	if (cq_host->ops->enable)
> >





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