Re: sdhci-esdhc-imx/v5.0-rc5: i.MX50 system hangs when "per" clock is disabled

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Hi Jonathan,

On Thu, Feb 7, 2019 at 8:52 PM Jonathan Neuschäfer
<j.neuschaefer@xxxxxxx> wrote:
>
> Hi,
>
> I'm currently porting mainline Linux to an i.MX507-based board
> (preliminary DT here[1]). Recently I've enabled esdhc1 in the
> devicetree.
>
> However, as soon as the mmc driver (sdhci-esdhc-imx.c) disables clk_per
> in sdhci_esdhc_runtime_suspend[2], the whole system locks up in some way.
> Booting with CONFIG_PM=n "fixes" the problem; commenting out the
> offending line in sdhci_esdhc_runtime_suspend lets the system survive,
> but leaves the MMC controller in an unusable state (of course it's not a
> proper solution anyway).
>
> I tried to compare the CCM's clocks between i.MX50 and i.MX53, but
> unfortunately, the i.MX50 reference manual doesn't have the table called
> "Output clocks from CCM".

Please check Table 5-10. CCM_CCGR3 Gated Clock Mapping to Target
Module from the MX50 Referene Manual.

>
> Does anyone have any ideas or patches that I could try in order to
> narrow the problem further down?

Does the change below help?

--- a/arch/arm/boot/dts/imx50.dtsi
+++ b/arch/arm/boot/dts/imx50.dtsi
@@ -102,7 +102,7 @@
                                        reg = <0x50004000 0x4000>;
                                        interrupts = <1>;
                                        clocks = <&clks
IMX5_CLK_ESDHC1_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks
IMX5_CLK_ESDHC1_IPG_GATE>,
                                                 <&clks
IMX5_CLK_ESDHC1_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
@@ -114,7 +114,7 @@
                                        reg = <0x50008000 0x4000>;
                                        interrupts = <2>;
                                        clocks = <&clks
IMX5_CLK_ESDHC2_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks
IMX5_CLK_ESDHC2_IPG_GATE>,
                                                 <&clks
IMX5_CLK_ESDHC2_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;




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