Disable the card clock during automatic pad drive strength calibration
and re-enable it aftewards.
Signed-off-by: Aapo Vienamo <avienamo@xxxxxxxxxx>
---
drivers/mmc/host/sdhci-tegra.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 61067b7..0de74f4 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -52,6 +52,7 @@
#define SDHCI_TEGRA_SDMEM_COMP_PADCTRL 0x1e0
#define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_MASK 0x0000000f
#define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_VAL 0x7
+#define SDHCI_TEGRA_PAD_E_INPUT_OR_E_PWRD BIT(31)
#define SDHCI_TEGRA_AUTO_CAL_STATUS 0x1ec
#define SDHCI_TEGRA_AUTO_CAL_ACTIVE BIT(31)
@@ -226,11 +227,35 @@ static void tegra_sdhci_configure_cal_pad(struct sdhci_host *host, bool enable)
udelay(1);
}
+static bool tegra_sdhci_configure_card_clk(struct sdhci_host *host, bool enable)
+{
+ bool orig_enabled;
+ u32 reg;
+
+ reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+ orig_enabled = reg & SDHCI_CLOCK_CARD_EN;
+
+ if (orig_enabled == enable)
+ return orig_enabled;
+
+ if (enable)
+ reg |= SDHCI_CLOCK_CARD_EN;
+ else
+ reg &= ~SDHCI_CLOCK_CARD_EN;
+
+ sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL);
+
+ return orig_enabled;
+}
+
static void tegra_sdhci_pad_autocalib(struct sdhci_host *host)
{
unsigned timeout = 10;
+ bool card_clk_enabled;
u32 reg;
+ card_clk_enabled = tegra_sdhci_configure_card_clk(host, false);
+
tegra_sdhci_configure_cal_pad(host, true);
reg = sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_CONFIG);
@@ -248,6 +273,8 @@ static void tegra_sdhci_pad_autocalib(struct sdhci_host *host)
tegra_sdhci_configure_cal_pad(host, false);
+ tegra_sdhci_configure_card_clk(host, card_clk_enabled);
+
if (timeout == 0)
dev_err(mmc_dev(host->mmc), "Pad autocal timed out\n");
}
--
2.7.4
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