On 2018/3/5 22:27, Ulf Hansson wrote:
On 5 March 2018 at 14:41, Harish Jenny K N <harish_kandiga@xxxxxxxxxx> wrote:This patch parses mmc host caps and caps2 exported via debugfs. Signed-off-by: Harish Jenny K N <harish_kandiga@xxxxxxxxxx> --- Changes in v2: - Added support for parsing caps2 mmc.c | 10 +++ mmc_cmds.c | 222 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ mmc_cmds.h | 2 + 3 files changed, 234 insertions(+) diff --git a/mmc.c b/mmc.c index 50c9c9e..dab81bd 100644 --- a/mmc.c +++ b/mmc.c @@ -53,6 +53,16 @@ static struct Command commands[] = { /* * avoid short commands different for the case only */ + { do_read_hostcaps, -1, + "hostcaps read", "<path to debugfs host caps file>\n" + "Prints parsed data from host caps file>.", + NULL + }, + { do_read_hostcaps2, -1, + "hostcaps2 read", "<path to debugfs host caps2 file>\n" + "Prints parsed data from host caps2 file>.", + NULL + }, { do_read_extcsd, -1, "extcsd read", "<device>\n" "Print extcsd data from <device>.", diff --git a/mmc_cmds.c b/mmc_cmds.c index 038dbd4..55a27f1 100644 --- a/mmc_cmds.c +++ b/mmc_cmds.c @@ -54,6 +54,61 @@ #define WPTYPE_PWRON 2 #define WPTYPE_PERM 3 +#define BIT(x) (1ul << x) + +#define MMCUTIL_4_BIT_DATA BIT(0) /*Can the host do 4 bit transfers*/ +#define MMCUTIL_MMC_HIGHSPEED BIT(1) /* Can do MMC high-speed timing */ +#define MMCUTIL_SD_HIGHSPEED BIT(2) /* Can do SD high-speed timing */ +#define MMCUTIL_SDIO_IRQ BIT(3) /* Can signal pending SDIO IRQs */ +#define MMCUTIL_SPI BIT(4) /* Talks only SPI protocols */ +#define MMCUTIL_NEEDS_POLL BIT(5) /* Needs polling for card-detection */ +#define MMCUTIL_8_BIT_DATA BIT(6) /* Can the host do 8 bit transfers */ +#define MMCUTIL_AGGRESSIVE_PM BIT(7) /* Suspend (e)MMC/SD at idle */ +#define MMCUTIL_NONREMOVABLE BIT(8) /* Nonremovable e.g. eMMC */ +#define MMCUTIL_WAIT_WHILE_BUSY BIT(9) /* Waits while card is busy */ +#define MMCUTIL_ERASE BIT(10) /* Allow erase/trim commands */ +#define MMCUTIL_3_3V_DDR BIT(11) /* Host supports eMMC DDR 3.3V */ +#define MMCUTIL_1_8V_DDR BIT(12) /* Host supports eMMC DDR 1.8V */ +#define MMCUTIL_1_2V_DDR BIT(13) /* Host supports eMMC DDR 1.2V */ +#define MMCUTIL_POWER_OFF_CARD BIT(14) /* Can power off after boot */ +#define MMCUTIL_BUS_WIDTH_TEST BIT(15) /* CMD14/CMD19 bus width ok */ +#define MMCUTIL_UHS_SDR12 BIT(16) /* Host supports UHS SDR12 mode */ +#define MMCUTIL_UHS_SDR25 BIT(17) /* Host supports UHS SDR25 mode */ +#define MMCUTIL_UHS_SDR50 BIT(18) /* Host supports UHS SDR50 mode */ +#define MMCUTIL_UHS_SDR104 BIT(19) /* Host supports UHS SDR104 mode */ +#define MMCUTIL_UHS_DDR50 BIT(20) /* Host supports UHS DDR50 mode */ +/* BIT(21) is free for reuse */ +#define MMCUTIL_DRIVER_TYPE_A BIT(23) /* Host supports Driver Type A */ +#define MMCUTIL_DRIVER_TYPE_C BIT(24) /* Host supports Driver Type C */ +#define MMCUTIL_DRIVER_TYPE_D BIT(25) /* Host supports Driver Type D */ +#define MMCUTIL_DONE_COMPLETE BIT(27) /* RW reqs can be completed */ +/* within mmc_request_done() */ +#define MMCUTIL_CD_WAKE BIT(28) /* Enable card detect wake */ +#define MMCUTIL_CMD_DURING_TFR BIT(29) /* Commands during data transfer*/ +#define MMCUTIL_CMD23 BIT(30) /* CMD23 supported. */ +#define MMCUTIL_HW_RESET BIT(31) /* Hardware reset */ + +#define MMCUTIL2_BOOTPART_NOACC BIT(0) /* Boot partition no access */ +#define MMCUTIL2_FULL_PWR_CYCLE BIT(2) /* Can do full power cycle */ +#define MMCUTIL2_HS200_1_8V_SDR BIT(5) /* can support */ +#define MMCUTIL2_HS200_1_2V_SDR BIT(6) /* can support */ +#define MMCUTIL2_CD_ACTIVE_HIGH BIT(10) /* Card-detect signal active high */ +#define MMCUTIL2_RO_ACTIVE_HIGH BIT(11) /* Write-protect signal active high */ +#define MMCUTIL2_NO_PRESCAN_POWERUP BIT(14) /* Don't power up before scan */ +#define MMCUTIL2_HS400_1_8V BIT(15) /* Can support HS400 1.8V */ +#define MMCUTIL2_HS400_1_2V BIT(16) /* Can support HS400 1.2V */ +#define MMCUTIL2_SDIO_IRQ_NOTHREAD BIT(17) +#define MMCUTIL2_NO_WRITE_PROTECT BIT(18) /* No physical write protect pin,*/ +/* assume that card is always read-write */ +#define MMCUTIL2_NO_SDIO BIT(19) /* Don't send SDIO commands */ +/* during initialization*/ +#define MMCUTIL2_HS400_ES BIT(20) /* Host supports enhanced strobe */ +#define MMCUTIL2_NO_SD BIT(21) /* Do not send SD commands */ +/* during initialization*/ +#define MMCUTIL2_NO_MMC BIT(22) /* Don't send (e)MMC commands*/ +/* during initialization */ +#define MMCUTIL2_CQE BIT(23) /* Has eMMC command queue engine */ +#define MMCUTIL2_CQE_DCMD BIT(24) /* CQE can issue a direct command */Sorry, but this doesn't work. We may very well be changing the bit offsets for the caps and caps2 in the mmc kernel header, keeping a copy of them is not a good idea. It's just a matter of *when* it will break.
I guess we could create a header file under include/uapi? This's how other drivers, for instance, tty, PCI or graphic subsystem to keep user space consistent with kernel side.
[...] Kind regards Uffe -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
-- Best Regards Shawn Lin -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
