Re: [PATCH 1/2] mmc: sdhci-pci: Fix S0i3 for Intel BYT-based controllers

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On 14 February 2018 at 14:57, Adrian Hunter <adrian.hunter@xxxxxxxxx> wrote:
> Tuning can leave the IP in an active state (Buffer Read Enable bit set)
> which prevents the entry to low power states (i.e. S0i3). Data reset will
> clear it.
>
> Generally tuning is followed by a data transfer which will anyway sort out
> the state, so it is rare that S0i3 is actually prevented.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@xxxxxxxxx>
> Cc: stable@xxxxxxxxxxxxxxx

Thanks, applied for fixes!

Kind regards
Uffe

> ---
>  drivers/mmc/host/sdhci-pci-core.c | 35 +++++++++++++++++++++++++++++++----
>  1 file changed, 31 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c
> index 5296b749d661..ba725580e944 100644
> --- a/drivers/mmc/host/sdhci-pci-core.c
> +++ b/drivers/mmc/host/sdhci-pci-core.c
> @@ -661,9 +661,36 @@ static void byt_read_dsm(struct sdhci_pci_slot *slot)
>         slot->chip->rpm_retune = intel_host->d3_retune;
>  }
>
> -static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
> +static int intel_execute_tuning(struct mmc_host *mmc, u32 opcode)
> +{
> +       int err = sdhci_execute_tuning(mmc, opcode);
> +       struct sdhci_host *host = mmc_priv(mmc);
> +
> +       if (err)
> +               return err;
> +
> +       /*
> +        * Tuning can leave the IP in an active state (Buffer Read Enable bit
> +        * set) which prevents the entry to low power states (i.e. S0i3). Data
> +        * reset will clear it.
> +        */
> +       sdhci_reset(host, SDHCI_RESET_DATA);
> +
> +       return 0;
> +}
> +
> +static void byt_probe_slot(struct sdhci_pci_slot *slot)
>  {
> +       struct mmc_host_ops *ops = &slot->host->mmc_host_ops;
> +
>         byt_read_dsm(slot);
> +
> +       ops->execute_tuning = intel_execute_tuning;
> +}
> +
> +static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
> +{
> +       byt_probe_slot(slot);
>         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
>                                  MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
>                                  MMC_CAP_CMD_DURING_TFR |
> @@ -786,7 +813,7 @@ static int ni_byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
>  {
>         int err;
>
> -       byt_read_dsm(slot);
> +       byt_probe_slot(slot);
>
>         err = ni_set_max_freq(slot);
>         if (err)
> @@ -799,7 +826,7 @@ static int ni_byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
>
>  static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
>  {
> -       byt_read_dsm(slot);
> +       byt_probe_slot(slot);
>         slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE |
>                                  MMC_CAP_WAIT_WHILE_BUSY;
>         return 0;
> @@ -807,7 +834,7 @@ static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
>
>  static int byt_sd_probe_slot(struct sdhci_pci_slot *slot)
>  {
> -       byt_read_dsm(slot);
> +       byt_probe_slot(slot);
>         slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY |
>                                  MMC_CAP_AGGRESSIVE_PM | MMC_CAP_CD_WAKE;
>         slot->cd_idx = 0;
> --
> 1.9.1
>
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