Hello Wolfram,
For my RZ/A1 DMA driver (it's a work in progress), the patch
52ad9a8e854c ("mmc: host: tmio: ensure end of DMA and SD access are in sync")
now causes a "BUG: scheduling while atomic"
Starting logging: BUG: scheduling while atomic: S01logging/434/0x00000100
CPU: 0 PID: 434 Comm: S01logging Not tainted 4.9.49-g845fe5990-dirty #29
Hardware name: Generic R7S72100 (Flattened Device Tree)
[<bf808d41>] (unwind_backtrace) from [<bf8075f3>] (show_stack+0xb/0xc)
[<bf8075f3>] (show_stack) from [<bf82038d>] (__schedule_bug+0x39/0x58)
[<bf82038d>] (__schedule_bug) from [<bfa2fba9>] (__schedule+0x21/0x238)
[<bfa2fba9>] (__schedule) from [<bfa2fe2d>] (schedule+0x51/0x58)
[<bfa2fe2d>] (schedule) from [<bfa313ad>] (schedule_timeout+0x15/0xcc)
[<bfa313ad>] (schedule_timeout) from [<bfa30427>] (wait_for_common+0x9b/0xbc)
[<bfa30427>] (wait_for_common) from [<bf9921e7>] (tmio_mmc_dma_callback+0xb/0x74)
[<bf9921e7>] (tmio_mmc_dma_callback) from [<bf908e1b>] (rzadma_tasklet+0x23/0x98)
[<bf908e1b>] (rzadma_tasklet) from [<bf810d9b>] (tasklet_action+0x3f/0x5c)
[<bf810d9b>] (tasklet_action) from [<bf810a47>] (__do_softirq+0x7f/0x144)
[<bf810a47>] (__do_softirq) from [<bf829917>] (__handle_domain_irq+0x51/0x6a)
[<bf829917>] (__handle_domain_irq) from [<bf80128b>] (gic_handle_irq+0x37/0x58)
[<bf80128b>] (gic_handle_irq) from [<bf807d25>] (__irq_svc+0x65/0x94)
I noticed that in rcar-dmac.c, the DMA channel IRQs are threaded:
ret = devm_request_threaded_irq(dmac->dev, irq, rcar_dmac_isr_channel,
rcar_dmac_isr_channel_thread, 0,
irqname, rchan);
Is it now a requirement that I have to register my DMA channel
interrupts as devm_request_threaded_irq?
Will that fix my issue?
Thank you,
Chris
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